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参数资料
型号： DSPIC33FJ32GP202-I/SO
厂商： Microchip Technology
文件页数： 117/176页
文件大小： 0K
描述： IC DSPIC MCU/DSP 32K 28SOIC
产品培训模块： Asynchronous Stimulus
特色产品： PIC24FJ/33FJ MCUs & dsPIC? DSCs
标准包装： 27
系列： dsPIC™ 33F
核心处理器： dsPIC
芯体尺寸： 16-位
速度： 40 MIP
连通性： I²C，IrDA，LIN，SPI，UART/USART
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 21
程序存储器容量： 32KB（32K x 8）
程序存储器类型： 闪存
RAM 容量： 2K x 8
电压 - 电源 (Vcc/Vdd)： 3 V ~ 3.6 V
数据转换器： A/D 10x12b
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 28-SOIC（0.295"，7.50mm 宽）
包装： 管件
产品目录页面： 652 (CN2011-ZH PDF)
配用： DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
2007-2011 Microchip Technology Inc.
DS70290J-page 45
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
4.4.1
SOFTWARE STACK
In addition to its use as a working register, the W15
register
in
the
dsPIC33FJ32GP202/204
and
dsPIC33FJ16GP304 devices is also used as a
software Stack Pointer. The Stack Pointer always
points to the first available free word and grows from
lower to higher addresses. It pre-decrements for stack
pops and post-increments for stack pushes, as shown
in Figure 4-4. For a PC push during any CALL
instruction, the MSB of the PC is zero-extended before
the push, ensuring that the MSB is always clear.
The Stack Pointer Limit register (SPLIM) associated
with the Stack Pointer sets an upper address boundary
for the stack. SPLIM is uninitialized at Reset. As is the
case for the Stack Pointer, SPLIM<0> is forced to ‘0’
because all stack operations must be word-aligned.
When an EA is generated using W15 as a source or
destination pointer, the resulting address is compared
with the value in SPLIM. If the contents of the Stack
Pointer (W15) and the SPLIM register are equal and a
push operation is performed, a stack error trap will not
occur. The stack error trap will occur on a subsequent
push operation. For example, to cause a stack error
trap when the stack grows beyond address 0x1000 in
RAM, initialize the SPLIM with the value 0x0FFE.
Similarly, a Stack Pointer underflow (stack error) trap is
generated when the Stack Pointer address is found to
be less than 0x0800. This prevents the stack from
interfering with the Special Function Register (SFR)
space.
A write to the SPLIM register should not be immediately
followed by an indirect read operation using W15.
FIGURE 4-4:
CALL STACK FRAME
4.4.2
DATA RAM PROTECTION FEATURE
The dsPIC33F product family supports Data RAM
protection features that enable segments of RAM to be
protected when used in conjunction with Boot and
Secure Code Segment Security. BSRAM (Secure RAM
segment for Boot Segment) is accessible only from the
Boot Segment Flash code when enabled. SSRAM
(Secure RAM segment for RAM) is accessible only
from the Secure Segment Flash code when enabled.
See Table 4-1 for an overview of the BSRAM and
SSRAM SFRs.
4.5
Instruction Addressing Modes
The addressing modes shown in Table 4-23 form the
basis of the addressing modes optimized to support the
specific features of individual instructions. The
addressing modes provided in the MAC class of
instructions differ from those in the other instruction
types.
4.5.1
FILE REGISTER INSTRUCTIONS
Most file register instructions use a 13-bit address field
(f) to directly address data present in the first 8192
bytes of data memory (Near Data Space). Most file
register instructions employ a working register, W0,
which is denoted as WREG in these instructions. The
destination is typically either the same file register or
WREG (with the exception of the MUL instruction),
which writes the result to a register or register pair. The
MOV instruction allows additional flexibility and can
access the entire data space.
4.5.2
MCU INSTRUCTIONS
The three-operand MCU instructions are of the form:
Operand 3 = Operand 1 <function> Operand 2
where:
Operand 1 is always a working register (that is, the
addressing mode can only be register direct), which is
referred to as Wb.
Operand 2 can be a W register, fetched from data
memory, or a 5-bit literal.
The result location can be either a W register or a data
memory location. The following addressing modes are
supported by MCU instructions:
Register Direct
Register Indirect
Register Indirect Post-Modified
Register Indirect Pre-Modified
5-bit or 10-bit Literal
Note:
A PC push during exception processing
concatenates the SRL register to the MSB
of the PC prior to the push.
<Free Word>
PC<15:0>
000000000
0
15
W15 (before CALL)
W15 (after CALL)
S
ta
ck
Gr
ow
sT
o
war
d
H
igh
er
A
ddr
es
s
0x0000
PC<22:16>
POP : [--W15]
PUSH : [W15++]
Note:
Not all instructions support all the
addressing
modes
given
above.
Individual
instructions
can
support
different subsets of these addressing
modes.
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相关代理商/技术参数
参数描述
DSPIC33FJ32GP202T-E/MM 制造商:Microchip Technology Inc 功能描述:
dsPIC33FJ32GP202T-I/MM 功能描述:数字信号处理器和控制器 - DSP, DSC 16B DSC 28LD32KB 40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32GP202T-I/SO 功能描述:数字信号处理器和控制器 - DSP, DSC 16B DSC 28LD32KB 40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32GP202T-I/SS 功能描述:数字信号处理器和控制器 - DSP, DSC 16 bit DSC 40MIPS 32KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
dsPIC33FJ32GP204-E/ML 功能描述:数字信号处理器和控制器 - DSP, DSC 16B DSC 44LD32KB 40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
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