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参数资料
| 型号： | E728-EDGE728 |
| 英文描述： | Very High-Speed Dual- and Quad-Channel ECL Delay Lines |
| 中文描述： | 极高速双和四通道ECL延迟线 |
| 文件页数： | 13/18页 |
| 文件大小： | 133K |
| 代理商： | E728-EDGE728 |
4
2000 Semtech Corp.
www .semtech.com
HIGH-PERFORMANCE PRODUCTS – ATE
Edge728
Circuit Description
Chip Overview
The Edge728 is a quad delay line and deskew element
offering a 8.0 ns minimum delay (Tspan), where the
VDELAY inputs adjust the overall propagation delay of the
part. In addition, the parts support a separate rising and
falling edge delay of
± 750 ps (Twidth), where the VWIDTH
inputs control the falling edge delay. There is also a drive
mode, where the channel 2 input drives all four Edge728
outputs, with all other inputs ignored.
The Edge728 is designed to be monotonic and very stable
in all modes of operation. Figure 1 shows a simplified
block diagram.
Figure 1. Edge728 Block Diagram
Operating Modes
The Edge728 has two modes of operation (described in
Table 1. )
Table 1. Delay Ranges Versus Mode
Mode 0
Mode 0 is a simple delay mode (see Figures 2 and 3).
The input signal for each channel is delayed by some
programmable amount determined by the analog input
VDELAY.
The rising and falling edges are delayed equally.
The
VWIDTH analog input has no function in mode 0, and
should be connected to device GND when used exclusively
in this mode. The propagation delay for a rising and falling
edge is defined as
Tpd+, Tpd–
= Tpd(min) + Tspan
where Tpd(min) is the raw propagation delay of the part
with minimum programmed delay, and Tspan is the
additional delay programmed via the VDELAY input.
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Figure 2. Mode 0 VDELAY Control
OUT1, OUT1*
VDELAY1
VWIDTH1
IN1, IN1*
T
OUT2, OUT2*
VDELAY2
VWIDTH2
IN2, IN2*
T
OUT3, OUT3*
VDELAY3
VWIDTH3
IN3, IN3*
T
OUT4, OUT4*
VDELAY4
VWIDTH4
IN4, IN4*
T
DRVMODE
TPDmin
Tspan
INPUT
OUTPUT
(VDELAY = Minimum)
OUTPUT
(VDELAY = Maximum)
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