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参数资料
| 型号： | EDI2AG272129V10D1 |
| 英文描述： | 2x128Kx72, 3.3V,10ns, Sync/Sync Burst SRAM Module(2x128Kx72, 3.3V，10ns,同步/同步脉冲静态RAM模块) |
| 中文描述： | 2x128Kx72，3.3伏，10纳秒，同步/同步突发静态存储器模块（2x128Kx72，3.3伏，10纳秒，同步/同步脉冲静态内存模块） |
| 文件页数： | 6/11页 |
| 文件大小： | 257K |
| 代理商： | EDI2AG272129V10D1 |
EDI2AG272129V
4
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
SYNCHRONOUS BURST - TRUTH TABLE
Operation
E1\
E2\
ADSP\
ADSC\
ADV\
GW\
G\
CLK
DQ
Addr. Used
Deselected Cycle, Power Down; Bank 1
H
X
L
X
L-H
High-Z
None
Deselected Cycle, Power Down; Bank 2
X
H
X
L
X
L-H
High-Z
None
Read Cycle, Begin Burst; Bank 1
L
H
L
X
L
L-H
Q
External
Read Cycle, Begin Burst; Bank 1
L
H
L
X
H
L-H
High-Z
External
Read Cycle, Begin Burst; Bank 2
H
L
X
L
L-H
Q
External
Read Cycle, Begin Burst; Bank 2
H
L
X
H
L-H
High-Z
External
Write Cycle, Begin Burst; Bank 1
L
H
L
X
L
X
L-H
D
External
Write Cycle, Begin Burst; Bank 2
H
L
H
L
X
L
X
L-H
D
External
Read Cycle, Begin Burst; Bank 1
L
H
L
X
H
L
L-H
Q
External
Read Cycle, Begin Burst; Bank 1
L
H
L
X
H
L-H
High-Z
External
Read Cycle, Begin Burst; Bank 2
H
L
H
L
X
H
L
L-H
Q
External
Read Cycle, Begin Burst; Bank 2
H
L
H
L
X
H
L-H
High-Z
External
Read Cycle, Continue Burst; Bank 1
X
H
X
H
L
H
L
L-H
Q
Next
Read Cycle, Continue Burst; Bank 1
X
H
X
H
L
H
L-H
High-Z
Next
Read Cycle, Continue Burst; Bank 2
H
X
H
L
H
L
L-H
Q
Next
Read Cycle, Continue Burst; Bank 2
H
X
H
L
H
L-H
High-Z
Next
Read Cycle, Continue Burst; Bank 1
H
X
H
L
H
L
L-H
Q
Next
Read Cycle, Continue Burst; Bank 1
H
X
H
L
H
L-H
High-Z
Next
Read Cycle, Continue Burst; Bank 2
H
X
H
L
H
L
L-H
Q
Next
Read Cycle, Continue Burst; Bank 2
H
X
H
L
H
L-H
High-Z
Next
Write Cycle, Continue Burst; Bank 1
X
H
L
X
L-H
D
Next
Write Cycle, Continue Burst; Bank 1
H
X
H
L
X
L-H
D
Next
Write Cycle, Continue Burst; Bank 2
H
X
H
L
X
L-H
D
Next
Write Cycle, Continue Burst; Bank 2
H
X
H
L
X
L-H
D
Next
Read Cycle, Suspend Burst; Bank 1
X
H
L
L-H
Q
Current
Read Cycle, Suspend Burst; Bank 1
X
H
L-H
High-Z
Current
Read Cycle, Suspend Burst; Bank 2
H
X
H
L
L-H
Q
Current
Read Cycle, Suspend Burst; Bank 2
H
X
H
L-H
High-Z
Current
Read Cycle, Suspend Burst; Bank 1
H
X
H
L
L-H
Q
Current
Read Cycle, Suspend Burst; Bank 1
H
X
H
L-H
High-Z
Current
Read Cycle, Suspend Burst; Bank 2
H
X
H
L
L-H
Q
Current
Read Cycle, Suspend Burst; Bank 2
H
X
H
L-H
High-Z
Current
Write Cycle, Suspend Burst; Bank 1
X
H
L
X
L-H
D
Current
Write Cycle, Suspend Burst; Bank 1
H
X
H
L
X
L-H
D
Current
Write Cycle, Suspend Burst; Bank 2
H
X
H
L
X
L-H
D
Current
Write Cycle, Suspend Burst; Bank 2
H
X
H
L
X
L-H
D
Current
相关PDF资料 |
PDF描述 |
|---|---|
| EDI2AG272129V12D1 | 2x128Kx72, 3.3V,12ns, Sync/Sync Burst SRAM Module(2x128Kx72, 3.3V，12ns,同步/同步脉冲静态RAM模块) |
| EDI2AG272129V85D1 | 2x128Kx72,, 3.3V,8.5ns, Sync/Sync Burst SRAM Module(2x128Kx72, 3.3V，8.5ns,同步/同步脉冲静态RAM模块) |
| EDI2AG272129V9D1 | 2x128Kx72, 3.3V,9ns, Sync/Sync Burst SRAM Module(2x128Kx72, 3.3V，9ns,同步/同步脉冲静态RAM模块) |
| EDI2AG27265V10D1 | 2x64Kx72, 3.3V,10ns, Sync/Sync Burst SRAM Module(2x64Kx72, 3.3V，10ns,同步/同步脉冲静态RAM模块) |
| EDI2AG27265V12D1 | 2x64Kx72, 3.3V,12ns, Sync/Sync Burst SRAM Module(2x64Kx72, 3.3V，12ns,同步/同步脉冲静态RAM模块) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EDI2AG272129V12D1 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:2 Megabyte Sync/Sync Burst, Small Outline DIMM |
| EDI2AG272129V85D1 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:2 Megabyte Sync/Sync Burst, Small Outline DIMM |
| EDI2AG272129V9D1 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:2 Megabyte Sync/Sync Burst, Small Outline DIMM |
| EDI2AG272129V-D1 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:SSRAM Modules |
| EDI2CG272128V | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:2x128Kx72, 3.3V Sync/Sync Burst SRAM SO-DIMM |
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