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参数资料
| 型号： | EDI8F2464C |
| 英文描述： | 64Kx24 Static RAM CMOS, High Speed Module(64Kx24高速CMOS静态RAM模块) |
| 中文描述： | 64Kx24的CMOS静态RAM，高速模块（64Kx24高速的CMOS静态内存模块） |
| 文件页数： | 4/6页 |
| 文件大小： | 86K |
| 代理商： | EDI8F2464C |
4
EDI8F2464C Rev. 8.0 4/96 ECO #7470
EDI8F2464C
64Kx24 SRAM Module
Symbol
15ns
20ns
25ns
Parameter
JEDEC
Alt.
Min
Max
Min
Max
Min
Max
Units
Write Cycle Time
TAVAV
TWC
15
20
25
ns
Chip Enable to
TELWH
TCW
10
13
20
ns
End of Write
TELEH
TCW
10
13
20
ns
Address Setup Time
TAVWL
TAS
0
3
5
ns
TAVEL
TAS
0
3
5
ns
Address Valid to
TAVWH
TAW
10
13
20
ns
End of Write
TAVEH
TAW
10
13
20
ns
Write Pulse Width
TWLWH
TWP
10
13
20
ns
TWLEH
TWP
10
13
20
ns
Write Recovery Time
TWHAX
TWR
3
4
5
ns
TEHAX
TWR
3
4
5
ns
Data Hold Time
TWHDX
TDH
5
ns
TEHDX
TDH
5
ns
Write to Output
in High Z (1)
TWLQZ
TWHZ
0
13
0
15
0
15
ns
Data to Write Time
TDVWH
TDW
10
13
15
ns
TDVEH
TDW
10
13
15
ns
Output Active from
End of Write (1)
TWHQX
TWLZ
3
ns
A
E
W
D
Q
TAVAV
TELWH
TAVWH
TWLWH
TAVWL
TDVWH
TWHDX
TWHQX
HIGH Z
TWLQZ
DATA VALID
TWHAX
Note 1: Parameter guaranteed, but not tested.
AC Characteristics Write Cycle
Write Cycle 1 - W Controlled
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