参数资料
型号: EM65565A
英文描述: Synchronous Rectified MOSFET Driver; Temperature Range: 0&degC to 70°C; Package: 8-SOIC
中文描述: 图形STN液晶显示器驱动器,内置内存
文件页数: 7/43页
文件大小: 291K
代理商: EM65565A
65 COM/ 132SEG Dot Matrix LCD Driver
15
EM65565A
The Display Data Latch Circuit
The display data latch circuit is a latch that temporarily stores the display data that is
output to the liquid crystal driver from the DDRAM.
Because the display normal/reverse status. Display ON/OFF status, and display all points
ON/OFF commands control only the data within the latch, they do not change the data within
the DDRAM itself.
The Oscillator Circuit
This is a CR-type oscillator that produces the display clock. The oscillator circuit is only
enabled when M/S=”H” and DCLKS=”H”. When DCLKS=”L” the oscillation stops, and the
display clock is input through the DCLK terminal.
Display Timing Generator Circuit
The display timing generator circuit generates the timing signal to the line address circuit
and the display data latch circuit using the display clock. The display data is latched into the
display data latch circuit synchronized with the display clock, and is output to the data driver
output terminal. Reading to the display data liquid crystal driver circuits is completely
independent of accesses to the DDRAM by the MPU. Consequently, even if the DDRAM is
accessed asynchronously during LCD, there is absolutely no adverse effect (such as
flickering) on the display.
Moreover, the display timing generator circuit generates the common timing and the
liquid crystal alternating current signal (FR) from the display clock. It generates a drive wave
from using a two-frames alternating current drive method, as is shown in Figure 6, for the
liquid crystal drive circuit.
64 65 123
4
63 64 65 1
23
CL
FR
COM0
COM1
RAM
DATA
SEGn
V0
V1
V4
Vss
V0
V1
V4
Vss
V0
V2
V3
Vss
Fig. 6
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