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| 型号： | EM78P451 |
| 英文描述： | Dual Advanced Synchronous Rectified Buck MOSFET Drivers with Protection Features; Temperature Range: 0°C to 70°C; Package: 16-QFN |
| 中文描述： | 8位微控制器的通用产品[英文] |
| 文件页数： | 28/52页 |
| 文件大小： | 1287K |
| 代理商： | EM78P451 |
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EM78P451
OTP ROM
This specification is subject to change without prior notice.
2002/03/01
34
4.7 RESET and Wake-up
A RESET is initiated by
(1) Power on reset, or
(2) WDT timeout. (if enabled)
WDTE
Setup
Time
WDT
WDT timeout
Power-
on Reset
Voltage
Detector
Oscillator
VDD
D
Q
CLK
CLR
CLK
Reset
Fig. 16 Block Diagram of Reset
The device is kept in a RESET condition for a period of approx. 18ms
1 (one oscillator start-up timer
period) after the reset is detected and Fig.16 is the block diagram of reset. Once the RESET occurs,
the following functions are performed.
The oscillator is running, or will be started.
The Program Counter (R2) is set to all "1".
When power is switched on, bits 5~6 of R3 and the upper 2 bits of R4 are cleared.
All I/O port pins are configured as input mode (high-impedance state).
The Watchdog timer and prescaler are cleared.
The Watchdog timer is enabled if Code Option bit ENWDT is "1".
The CONT register is set to all "1" except bit 6 (INT flag).
Bits 3,6 of IOCE register are cleared, bits 0,4~5 of IOCE register are set to "1".
1 NOTE: Vdd = 5V, set up time period = 16.2ms ± 5%
Vdd = 3V, set up time period = 18.0ms ± 5%
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