参数资料
型号: ENH057Q1-450
英文描述: Low Noise LDO with Low IQ, High PSRR; Temperature Range: -40°C to 85°C; Package: 6-uTDFN T&R
中文描述: 5.7inch的QVGA
文件页数: 18/21页
文件大小: 322K
代理商: ENH057Q1-450
Original specifications created by Sharp.
6
Panelview Hillsboro, OR (503) 690-2460
Panelview is a subsidiary of White Electronic Designs Corporation
ENH050Q1-320/450/600
Panelview
Enhancing the Vision
Parameter
SymbolMIN
TYP
MAX
Unit
Remarks
Horizontal
pulse width
tHS2
3.2
3.9
4.6
s
f=fH (18)
sync. output
phase difference
tpd
0.4
1.1
1.8
s
(19)
pulse
rise time
trHO
0.5
s
CL=10pF
[HSY]
fall time
tfHO
0.5
s
Vertical
pulse width
tvs
4H
s
1H=1/fH
sync. output
phase difference
tvHO
11.0
28.0
s
(20)
pulse
rise time
trVO
2.0
s
CL=10pF
[VSY]
fall time
tfVO
2.0
s
Vertical
odd field
tPV1
1H
s
1H=1/fH
phase difference
even field
tPV2
0.5H
s
(21)
Clock
NTSC MODE
fCLO
fH x XXX
MHz
SAMC=Hi
output frequency
PAL MODE
fCLO
fH x XXX
MHz
(22)
[CLK]
NTSC MODE
fCLO
fH x XXX
MHz
SAMC=Lo
PAL MODE
fCLO
fH x XXX
MHz
(23)
(Supply voltage condition: VSH = +8.0V, VSL = 5.0V)
Notes:
18. Adjusted by variable resister (H-POS) in a module.
19. Variable by variable resister (H-POS) in a module.
adjustment : tpd = 1.1 ± 0. 7 s
20. Synchronized with HSY, based on falling timing of HSY.
21. VSY signal delays.
22. Independent sampling mode.
23. Simultaneous sampling mode.
INPUT/OUTPUT SIGNAL TIMING CHART (FIG. 6)
(CLKC=HIGH, NTSC: fH=15.7KHZ, fV=60HZ/PAL: fH=15.6KHZ, fV=50HZ)
1201
2
1209
2
1209
6
1201
6
Display Time Range
NTSC (M) mode (NTP=High, CLKC=High)
Displaying the following range within video signals.
Horizontally: 12.2 ~ 63 s
from the falling edge
of HSY. (SAM=High)
12.3 ~ 62.9 s from the falling edge
of HSY. (SAM=Low)
Vertically:
20 ~ 253 H
from the falling edge
of VSY.
PAL(B-G) Mode (NTP=Low, CLKC=High )
Displaying the following range within video signals.
Horizontally: 13.0 ~ 63.8 s from the falling edge
of HSY. (SAM=High)
13.1 ~ 63.7 s from the falling edge
of HSY. (SAM=Low)
Vertically:
26 ~ 298 H
from the falling edge
of VSY.
However, the video signals of
(14n+12)H, (14n+20) H/Even field.
(14n+17)H, (14n+23) H/Odd field (n=1, 2..., 20)
are not displayed on the module.
External Clock Mode (NTP=High, CLKC= Lo )
Displaying the following range within video signals.
Horizontally: 205 ~ 1164 clk from the falling edge
of HSY. (SAM=High)
84 ~ 403 clk from the falling edge
of HSY. (SAM=Low)
(clk means input external clock.)
Vertically:
20 ~ 253 H
from the falling edge
of VSY.
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