EP20K200CF484I8ES PDF资料下载(53/114 页)ASIC

参数资料

Altera Corporation

APEX 20K Programmable Logic Device Family Data Sheet

Figure 28 shows how a column IOE connects to the interconnect.

Figure 28. Column IOE Connection to the Interconnect

Dedicated Fast I/O Pins

APEX 20KE devices incorporate an enhancement to support bidirectional

pins with high internal fanout such as PCI control signals. These pins are

called Dedicated Fast I/O pins (FAST1, FAST2, FAST3, and FAST4) and

replace dedicated inputs. These pins can be used for fast clock, clear, or

high fanout logic signal distribution. They also can drive out. The

Dedicated Fast I/O pin data output and tri-state control are driven by

local interconnect from the adjacent MegaLAB for high speed.

Row Interconnect

Column Interconnect

Each IOE can drive column interconnect. In APEX 20KE devices,

IOEs can also drive FastRow interconnect. Each IOE data

and OE signal is driven by local interconnect.

Any LE or ESB can drive

a column pin through a

row, column, and MegaLAB

interconnect.

IOE

LAB

An LE or ESB can drive a

pin through a local

interconnect for faster

clock-to-output times.

MegaLAB Interconnect

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