参数资料
型号: EP20K400GI655-3
元件分类: CPU监测
英文描述: RTC Module With CPU Supervisor
中文描述: 时钟模块CPU监控
文件页数: 77/114页
文件大小: 1623K
代理商: EP20K400GI655-3
Altera Corporation
65
APEX 20K Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
See the Operating Requirements for Altera Devices Data Sheet.
(2)
Minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 5.75 V for
input currents less than 100 mA and periods shorter than 20 ns.
(3)
Numbers in parentheses are for industrial-temperature-range devices.
(4)
Maximum VCC rise time is 100 ms, and VCC must rise monotonically.
(5)
All pins, including dedicated inputs, clock I/O, and JTAG pins, may be driven before VCCINT and VCCIO are
powered.
(6)
Typical values are for TA= 25° C, VCCINT = 2.5 V, and VCCIO = 2.5 or 3.3 V.
(7)
These values are specified in the APEX 20K device recommended operating conditions, shown in Table 26 on
page 62.
(8)
The APEX 20K input buffers are compatible with 2.5-V and 3.3-V (LVTTL and LVCMOS) signals. Additionally, the
input buffers are 3.3-V PCI compliant when VCCIO and VCCINT meet the relationship shown in Figure 33 on page 68.
(9)
The IOH parameter refers to high-level TTL, PCI or CMOS output current.
(10) The IOL parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
as well as output pins.
(11) This value is specified for normal device operation. The value may vary during power-up.
(12) Pin pull-up resistance values will be lower if an external source drives the pin higher than VCCIO.
(13) Capacitance is sample-tested only.
Tables 31 through 34 provide information on absolute maximum ratings,
recommended operating conditions, DC operating conditions, and
capacitance for 1.8-V APEX 20KE devices.
Table 31. APEX 20KE Device Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min
Max
Unit
VCCINT
Supply voltage
With respect to ground (2)
–0.5
2.5
V
VCCIO
–0.5
4.6
V
VI
DC input voltage
–0.5
4.6
V
IOUT
DC output current, per pin
–25
25
mA
T STG
Storage temperature
No bias
–65
150
° C
T AMB
Ambient temperature
Under bias
–65
135
° C
T J
Junction temperature
PQFP, RQFP, TQFP, and BGA packages,
under bias
135
° C
Ceramic PGA packages, under bias
150
° C
相关PDF资料
PDF描述
EP20K400GI655-3ES RTC Module With CPU Supervisor
EP20K600CB652I7ES RTC Module With CPU Supervisor
EP20K600CB652I8ES RTC Module With CPU Supervisor
EP20K600CB652I9ES RTC Module With CPU Supervisor
EP20K600CF1020I7ES RTC Module With CPU Supervisor
相关代理商/技术参数
参数描述
EP20K400GI655-3ES 制造商:未知厂家 制造商全称:未知厂家 功能描述:FPGA
EP20K600C 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:Programmable Logic
EP20K600CB652C7 功能描述:FPGA - 现场可编程门阵列 CPLD - APEX 20K 2432 Macros 488 IO RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP20K600CB652C9 功能描述:FPGA - 现场可编程门阵列 CPLD - APEX 20K 2432 Macro 488 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP20K600CB652I7ES 制造商:未知厂家 制造商全称:未知厂家 功能描述:ASIC