参数资料
| 型号： | EP9315-IB |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 2/16页 |
| 文件大小： | 0K |
| 描述： | IC ARM920T MCU 200MHZ 352-PBGA |
| 标准包装： | 40 |
| 系列： | EP9 |
| 核心处理器： | ARM9 |
| 芯体尺寸： | 16/32-位 |
| 速度： | 200MHz |
| 连通性： | EBI/EMI，EIDE，以太网，I²C，IrDA，键盘/触摸屏，PCMCIA，SPI，UART/USART，USB |
| 外围设备： | AC'97，DMA，I²S，LCD，LED，MaverickKey，POR，PWM，WDT |
| 输入/输出数： | 16 |
| 程序存储器类型： | ROMless |
| RAM 容量： | 32K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.65 V ~ 3.6 V |
| 数据转换器： | A/D 8x12b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 352-BGA |
| 包装： | 托盘 |
| 配用： | 598-1144-ND - KIT DEVELOPMENT EP9315 ARM9 |
| 其它名称： | 598-1262 |
10
ER638E2B
Workaround
Separating the first and second instruction by one instruction will avoid this error whether or not the
coprocessor is operating in serialized or unserialized mode. For example:
; load sequence
cfadd32ne
c0, c1, c2
; assume this does not execute
nop
; inserted extra instruction here
cfldr64
c3, [r2, #0x0]
; store sequence
cfadd32ne
c4, c5, c6
; assume this does not execute
nop
; inserted extra instruction here
cfstr64
c3, [r2, #0x0]
Note that the effect of branches should also be accounted for, as it is the instruction stream as seen by the
coprocessor that matters, not the order of instructions in the source code. The two instructions following a
taken branch may be seen by the coprocessor and then not executed, and would be treated exactly as the
first instruction above.
To avoid this error when entering exception and interrupt handlers, the first instruction in an interrupt or
exception handler should not be a coprocessor instruction. Since the first instruction is normally a branch,
this error should not appear.
Description 4
When the coprocessor is not in serialized mode2 and forwarding is enabled, memory can be corrupted when
two types of instructions appear in the instruction stream with a particular relative timing.
1) Execute an instruction that is a data operation (not a move between ARM and coprocessor registers)
whose destination is one of the general purpose register c0 through c15.
2) Execute an instruction that is a two-word coprocessor store (either cfstr64 or cfstrd), where the destina-
tion register of the first instruction is the source of the store instruction, that is, the second instruction
stores the result of the first one to memory.
3) Finally, the first and second instruction must appear to the coprocessor with the correct relative timing;
this timing is not simply proportional to the number of intervening instructions and is difficult to predict in
general.
The result is that the lower 32 bits of the result stored to memory will be correct, but the upper the 32 bits
will be wrong. The value appearing in the target register will still be correct.
Workaround
One workaround is to operate the coprocessor without forwarding enabled, with a possible decrease in
performance.
Another is to operate in serialized mode by enabling at least one exception, with significantly reduced
performance.
Another workaround is to insure that at least seven instructions appear between the first and second
instructions that cause the error.
(Continued)
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| EP9315-IBZ | 功能描述:微处理器 - MPU IC Universal Platfrm ARM9 SOC Prcessor RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| EP9316 | 制造商:PCA 制造商全称:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines |
| EP9317 | 制造商:PCA 制造商全称:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines |
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| EP9319 | 制造商:PCA 制造商全称:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines |
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