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参数资料
| 型号： | EPCS64SI16N |
| 厂商： | Altera |
| 文件页数： | 19/40页 |
| 文件大小： | 0K |
| 描述： | IC CONFIG DEVICE 64MBIT 16-SOIC |
| 产品培训模块： | Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 49 |
| 系列： | EPCS |
| 可编程类型： | 系统内可编程 |
| 存储容量： | 64Mb |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 管件 |
| 产品目录页面： | 604 (CN2011-ZH PDF) |
| 其它名称： | 544-1380-5 EPCS64SI16 EPCS64SI16N-ND |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页当前第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页
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Figure 15 shows the instruction sequence of the write bytes operation.
Erase Bulk Operation
The erase bulk operation code is b'1100 0111 and it lists the MSB first. This operation sets all the memory bits to 1 or 0xFF.
Similar to the write bytes operation, you must execute the write enable operation before the erase bulk operation so that the
write enable latch bit in the status register is set to 1.
You can implement the erase bulk operation by driving the nCS signal low and then shifting in the erase bulk operation code on
the ASDI pin. The nCS signal must be driven high after the eighth bit of the erase bulk operation code has been latched in.
The device initiates a self-timed erase bulk cycle immediately after the nCS signal is driven high. For more information about
You must account for this delay before accessing the memory contents. Alternatively, you can check the write in progress bit in
the status register by executing the read status operation while the self-timed erase cycle is in progress. The write in progress
bit is set to 1 during the self-timed erase cycle and 0 when it is complete. The write enable latch bit in the status register is reset
to 0 before the erase cycle is complete.
Figure 15. Write Bytes Operation Timing Diagram (1)
Notes to Figure 15:
(1) Use the erase sector operation or the erase bulk operation to initialize the memory bytes of the EPCS devices to all 1 or 0xFF before implementing the write bytes operation.
(2) Address bit A[23] is a don't-care bit in the EPCS64 device. Address bits A[23..21] are don't-care bits in the EPCS16 device. Address bits A[23..19] are don't-care bits in the EPCS4 device. Address
bits A[23..17] are don't-care bits in the EPCS1 device.
(3) For .rpd files, write the LSB of the data byte first.
nCS
DCLK
ASDI
0
1
2
3
4
5
6
7
8
9
10
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
2072 2073 2074 2075 2076 2077 2078 2079
Operation Code
24-Bit Address (2)
23
22
21
3
2
1
0
765
4
MSB
MSB (3)
Data Byte 1
Data Byte 2
Data Byte 256
321
0
765
4
7
65
4
321
0
321
0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPCSC2.5T | 功能描述:接线端子工具和配件 End Plate RoHS:否 制造商:Phoenix Contact 产品:Tools & Accessories 类型:End Bracket |
| EPCSC2.5T1-2 | 功能描述:接线端子工具和配件 End Plate RoHS:否 制造商:Phoenix Contact 产品:Tools & Accessories 类型:End Bracket |
| EPCSC2.5T2-2 | 功能描述:接线端子工具和配件 End Plate RoHS:否 制造商:Phoenix Contact 产品:Tools & Accessories 类型:End Bracket |
| EPCSC2.5T2-2/BL | 功能描述:接线端子工具和配件 End Plate , Black (50) RoHS:否 制造商:Phoenix Contact 产品:Tools & Accessories 类型:End Bracket |
| EPCSC2.5T2-2/BU | 功能描述:接线端子工具和配件 End Plate , Blue (50) RoHS:否 制造商:Phoenix Contact 产品:Tools & Accessories 类型:End Bracket |
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