- 您现在的位置：买卖IC网 > PDF目录97927 > EPF10K200EFC672-2 Field Programmable Gate Array (FPGA) PDF资料下载
参数资料
| 型号： | EPF10K200EFC672-2 |
| 英文描述： | Field Programmable Gate Array (FPGA) |
| 中文描述： | 现场可编程门阵列（FPGA） |
| 文件页数： | 43/120页 |
| 文件大小： | 1901K |
| 代理商： | EPF10K200EFC672-2 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页当前第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页
Altera Corporation
29
FLEX 10KE Embedded Programmable Logic Family Data Sheet
For improved routing, the row interconnect consists of a combination of
full-length and half-length channels. The full-length channels connect to
all LABs in a row; the half-length channels connect to the LABs in half of
the row. The EAB can be driven by the half-length channels in the left half
of the row and by the full-length channels. The EAB drives out to the full-
length channels. In addition to providing a predictable, row-wide
interconnect, this architecture provides increased routing resources. Two
neighboring LABs can be connected using a half-row channel, thereby
saving the other half of the channel for the other half of the row.
Table 7 summarizes the FastTrack Interconnect routing structure
resources available in each FLEX 10KE device.
In addition to general-purpose I/O pins, FLEX 10KE devices have six
dedicated input pins that provide low-skew signal distribution across the
device. These six inputs can be used for global clock, clear, preset, and
peripheral output enable and clock enable control signals. These signals
are available as control signals for all LABs and IOEs in the device. The
dedicated inputs can also be used as general-purpose data inputs because
they can feed the local interconnect of each LAB in the device.
Figure 14 shows the interconnection of adjacent LABs and EABs, with
row, column, and local interconnects, as well as the associated cascade
and carry chains. Each LAB is labeled according to its location: a letter
represents the row and a number represents the column. For example,
LAB B3 is in row B, column 3.
Table 7. FLEX 10KE FastTrack Interconnect Resources
Device
Rows
Channels per
Row
Columns
Channels per
Column
EPF10K30E
6
216
36
24
EPF10K50E
EPF10K50S
10
216
36
24
EPF10K100B
EPF10K100E
12
312
52
24
EPF10K130E
16
312
52
32
EPF10K200E
EPF10K200S
24
312
52
48
相关PDF资料 |
PDF描述 |
|---|---|
| EPF10K200EFC672-3 | Field Programmable Gate Array (FPGA) |
| EPF10K200SBC356-1 | Field Programmable Gate Array (FPGA) |
| EPF10K200SBC356-1X | Field Programmable Gate Array (FPGA) |
| EPF10K200SBC356-2 | Field Programmable Gate Array (FPGA) |
| EPF10K200SBC356-2X | Field Programmable Gate Array (FPGA) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EPF10K200EFC672-3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200EGC599-1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述: |
| EPF10K200EGC599-2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述: |
| EPF10K200EGC599-3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述: |
| EPF10K200S | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:Embedded Programmable Logic Device |
发布紧急采购，3分钟左右您将得到回复。