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参数资料
型号： EPF10K30EQC208-3N
厂商： Altera
文件页数： 40/100页
文件大小： 0K
描述： IC FLEX 10KE FPGA 30K 208-PQFP
产品培训模块： Three Reasons to Use FPGA's in Industrial Designs
标准包装： 72
系列： FLEX-10KE®
LAB/CLB数： 216
逻辑元件/单元数： 1728
RAM 位总计： 24576
输入/输出数： 147
门数： 119000
电源电压： 2.375 V ~ 2.625 V
安装类型： 表面贴装
工作温度： 0°C ~ 85°C
封装/外壳： 208-BFQFP
供应商设备封装： 208-PQFP（28x28）
44
Altera Corporation
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
All FLEX 10KE devices provide JTAG BST circuitry that complies with the
IEEE Std. 1149.1-1990 specification. FLEX 10KE devices can also be
configured using the JTAG pins through the BitBlaster or ByteBlasterMV
download cable, or via hardware that uses the JamTM STAPL
programming and test language. JTAG boundary-scan testing can be
performed before or after configuration, but not during configuration.
FLEX 10KE devices support the JTAG instructions shown in Table 15.
The instruction register length of FLEX 10KE devices is 10 bits. The
USERCODE register length in FLEX 10KE devices is 32 bits; 7 bits are
determined by the user, and 25 bits are pre-determined. Tables 16 and 17
show the boundary-scan register length and device IDCODE information
for FLEX 10KE devices.
Table 15. FLEX 10KE JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern to be output at the device
pins.
EXTEST
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins.
BYPASS
Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation.
USERCODE
Selects the user electronic signature (USERCODE) register and places it between the
TDI
and TDO pins, allowing the USERCODE to be serially shifted out of TDO.
IDCODE
Selects the IDCODE register and places it between TDI and TDO, allowing the IDCODE
to be serially shifted out of TDO.
ICR Instructions
These instructions are used when configuring a FLEX 10KE device via JTAG ports with
a BitBlaster or ByteBlasterMV download cable, or using a Jam File (.jam) or
Jam Byte-Code File (.jbc) via an embedded processor.
Table 16. FLEX 10KE Boundary-Scan Register Length
Device
Boundary-Scan Register Length
EPF10K30E
690
EPF10K50E
EPF10K50S
798
EPF10K100E
1,050
EPF10K130E
1,308
EPF10K200E
EPF10K200S
1,446
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EPF10K30EQI208-1DX 制造商:未知厂家 制造商全称:未知厂家 功能描述:ASIC
EPF10K30EQI208-2 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 147 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K30EQI208-2DX 制造商:未知厂家 制造商全称:未知厂家 功能描述:ASIC
EPF10K30EQI208-2N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 147 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K30EQI208-3DX 制造商:未知厂家 制造商全称:未知厂家 功能描述:ASIC
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