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参数资料
| 型号： | EPF10K50E |
| 厂商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family(FLEX10KE嵌入式可编程逻辑系列) |
| 中文描述： | 嵌入式可编程逻辑系列（FLEX10KE嵌入式可编程逻辑系列） |
| 文件页数： | 2/2页 |
| 文件大小： | 168K |
| 代理商： | EPF10K50E |
Copyright 1996 Altera Corporation. Altera and FLEX are registered trademarks, and FLEX 10K is a trademark
of Altera Corporation. Other brands or products are trademarks of their respective holders. The specifications
contained herein are subject to change without notice. All rights reserved.
Each EAB can implement a 4 x 4, 5 x 3, or 6 x 2 multiplier. Multipliers with wider inputs or outputs
can be split into multiple EABs and still achieve higher performance and efficiency than those
implemented only in logic cells.
Self-Contained EAB: Ideal for Pipelined Design
Implementing complex combinatorial functions, such as multipliers, in programmable logic devices
typically results in long signal propagation delays. These delays slow down the overall clock speed
of a synchronous system. Pipelining is a technique for maintaining high system speed by inserting
registers in combinatorial logic paths to keep the paths short. Once the data fills the pipeline, the
pipelined design has a higher overall throughput than a design with a long and continuous combina-
torial path.
FLEX 10K devices have input and output registers within the EABs, making them ideal for pipelin-
ing. Pipelining can increase the system clock rate from 23 to 32 MHz for an 8 x 8 multiplier.
Input and Output Registers of EABs Used as Pipelining Registers
Optional Pipelining Registers
EAB
X
[3..0]
X
[7..4]
Y
[7..4]
X
[3..0]
Y
[3..0]
Y
[7..4]
X
[7..4]
Y
[3..0]
Multiplier
Z
[3..0]
Z
[11..8]
Z
[7..4]
Z
[15..12]
Computation-intensive applications such as digital filtering, data compression, and image process-
ing benefit greatly from high-performance, efficient multipliers. With both an embedded array and a
logic array, a FLEX 10K device can implement compact multipliers with higher performance than
existing FPGAs.
The documents listed below provide more detailed information. Part numbers are in parentheses.
Product Information Bulletins
PIB 20
Benefits of Embedded
RAM in
FLEX 10K Devices
(A-PIB-020-01)
PIB 21
Implementing Logic with Embedded
Arrays in FLEX 10K Devices
(A-PIB-021-01)
Application Notes
AN 53
Implementing Multipliers in
FLEX 10K Devices (A-AN-053-01)
AN 52
RAM Functions in FLEX 10K Devices
(A-AN-052-01)
You can request these documents from:
Altera Express fax service at (800) 5-ALTERA
World-Wide Web at
http://www.altera.com
Your local Altera sales representative
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPF10K50EFC256-1 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K50EFC256-2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K50EFC256-2N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K50EFC256-3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K50EFC256-3N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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