参数资料
型号: EPF10K50VBC356-3
厂商: Altera
文件页数: 47/128页
文件大小: 0K
描述: IC FLEX 10KV FPGA 50K 356-BGA
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 24
系列: FLEX-10K®
LAB/CLB数: 360
逻辑元件/单元数: 2880
RAM 位总计: 20480
输入/输出数: 274
门数: 116000
电源电压: 3 V ~ 3.6 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 356-BGA
供应商设备封装: 356-BGA(35x35)
其它名称: 544-1946
EPF10K50VBC356-3-ND
Altera Corporation
25
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
FastTrack Interconnect
In the FLEX 10K architecture, connections between LEs and device I/O
pins are provided by the FastTrack Interconnect, which is a series of
continuous horizontal and vertical routing channels that traverse the
device. This global routing structure provides predictable performance,
even in complex designs. In contrast, the segmented routing in FPGAs
requires switch matrices to connect a variable number of routing paths,
increasing the delays between logic resources and reducing performance.
The FastTrack Interconnect consists of row and column interconnect
channels that span the entire device. Each row of LABs is served by a
dedicated row interconnect. The row interconnect can drive I/O pins and
feed other LABs in the device. The column interconnect routes signals
between rows and can drive I/O pins.
A row channel can be driven by an LE or by one of three column channels.
These four signals feed dual 4-to-1 multiplexers that connect to two
specific row channels. These multiplexers, which are connected to each
LE, allow column channels to drive row channels even when all eight LEs
in an LAB drive the row interconnect.
Each column of LABs is served by a dedicated column interconnect. The
column interconnect can then drive I/O pins or another row’s
interconnect to route the signals to other LABs in the device. A signal from
the column interconnect, which can be either the output of an LE or an
input from an I/O pin, must be routed to the row interconnect before it
can enter an LAB or EAB. Each row channel that is driven by an IOE or
EAB can drive one specific column channel.
Access to row and column channels can be switched between LEs in
adjacent pairs of LABs. For example, an LE in one LAB can drive the row
and column channels normally driven by a particular LE in the adjacent
LAB in the same row, and vice versa. This routing flexibility enables
routing resources to be used more efficiently. See Figure 11.
相关PDF资料
PDF描述
A42MX24-3PLG84I IC FPGA MX SGL CHIP 36K 84-PLCC
RMA50DRMD-S664 CONN EDGECARD 100POS .125 SQ WW
175753-9 CONN SHIELD CASE .050 100POS WHT
175753-8 CONN SHIELD CASE .050 68POS WHT
175753-7 CONN SHIELD CASE .050 50POS WHT
相关代理商/技术参数
参数描述
EPF10K50VBC356-3N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K50VBC356-4 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K50VBC356-4N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K50VBI356-3 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K50VBI356-3N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256