参数资料
型号: EPF8452ALC84-3
厂商: Altera
文件页数: 9/62页
文件大小: 0K
描述: IC FLEX 8000A FPGA 4K 84-PLCC
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 75
系列: FLEX 8000
LAB/CLB数: 42
逻辑元件/单元数: 336
输入/输出数: 68
门数: 4000
电源电压: 4.75 V ~ 5.25 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 84-LCC(J 形引线)
供应商设备封装: 84-PLCC(29.31x29.31)
其它名称: 544-2256-5
Altera Corporation
17
FLEX 8000 Programmable Logic Device Family Data Sheet
FL
EX
800
0
3
Each LE in an LAB can drive up to two separate column interconnect
channels. Therefore, all 16 available column channels can be driven by the
LAB. The column channels run vertically across the entire device, and
share access to LABs in the same column but in different rows. The
MAX+PLUS II Compiler chooses which LEs must be connected to a
column channel. A row interconnect channel can be fed by the output of
the LE or by two column channels. These three signals feed a multiplexer
that connects to a specific row channel. Each LE is connected to one 3-to-1
multiplexer. In an LAB, the multiplexers provide all 16 column channels
with access to 8 row channels.
Each column of LABs has a dedicated column interconnect that routes
signals out of the LABs into the column. The column interconnect can then
drive I/O pins or feed into the row interconnect to route the signals to
other LABs in the device. A signal from the column interconnect, which
can be either the output of an LE or an input from an I/O pin, must
transfer to the row interconnect before it can enter an LAB. Table 4
summarizes the FastTrack Interconnect resources available in each
FLEX 8000 device.
Figure 9 shows the interconnection of four adjacent LABs, with row,
column, and local interconnects, as well as the associated cascade and
carry chains.
Table 4. FLEX 8000 FastTrack Interconnect Resources
Device
Rows
Channels per Row
Columns
Channels per Column
EPF8282A
EPF8282AV
2
168
13
16
EPF8452A
2
168
21
16
EPF8636A
3
168
21
16
EPF8820A
4
168
21
16
EPF81188A
6
168
21
16
EPF81500A
6
216
27
16
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