参数资料
| 型号： | EPF8452ALC84-4 |
| 厂商： | Altera |
| 文件页数： | 17/62页 |
| 文件大小： | 0K |
| 描述： | IC FLEX 8000A FPGA 4K 84-PLCC |
| 产品培训模块： | Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 75 |
| 系列： | FLEX 8000 |
| LAB/CLB数： | 42 |
| 逻辑元件/单元数： | 336 |
| 输入/输出数： | 68 |
| 门数： | 4000 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 84-LCC（J 形引线） |
| 供应商设备封装： | 84-PLCC（29.31x29.31） |
| 产品目录页面： | 602 (CN2011-ZH PDF) |
| 其它名称： | 544-2257-5 |
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Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
MultiVolt I/O Interface
The FLEX 8000 device architecture supports the MultiVolt I/O interface
feature, which allows EPF81500A, EPF81188A, EPF8820A, and EPF8636A
devices to interface with systems with differing supply voltages. These
devices in all packages—except for EPF8636A devices in 84-pin PLCC
packages—can be set for 3.3-V or 5.0-V I/O pin operation. These devices
have one set of VCC pins for internal operation and input buffers
(VCCINT), and another set for I/O output drivers (VCCIO).
The VCCINT pins must always be connected to a 5.0-V power supply. With
a 5.0-V VCCINT level, input voltages are at TTL levels and are therefore
compatible with 3.3-V and 5.0-V inputs.
The VCCIO pins can be connected to either a 3.3-V or 5.0-V power supply,
depending on the output requirements. When the VCCIO pins are
connected to a 5.0-V power supply, the output levels are compatible with
5.0-V systems. When the VCCIO pins are connected to a 3.3-V power
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V
or 5.0-V systems. Devices operating with VCCIO levels lower than 4.75 V
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
The EPF8282A, EPF8282AV, EPF8636A, EPF8820A, and EPF81500A
devices provide JTAG BST circuitry. FLEX 8000 devices with JTAG
circuitry support the JTAG instructions shown in Table 6.
Table 6. EPF8282A, EPF8282AV, EPF8636A, EPF8820A & EPF81500A JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD Allows a snapshot of the signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern to be output at the device pins.
EXTEST
Allows the external circuitry and board-level interconnections to be tested by forcing a test
pattern at the output pins and capturing test results at the input pins.
BYPASS
Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST
data to pass synchronously through the selected device to adjacent devices during
normal device operation.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPF8452ALC844N | 制造商:Altera Corporation 功能描述:FPGA FLEX 8000 Family 4K Gates 336 Cells 125MHz CMOS Technology 5V 84-Pin PLCC 制造商:Altera 功能描述:FPGA FLEX 8000 Family 4K Gates 336 Cells 125MHz CMOS Technology 5V 84-Pin PLCC |
| EPF8452ALC84-4N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 8000 42 LABs 68 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF8452ALC84-6 | 制造商:Altera Corporation 功能描述:Field-Programmable Gate Array, 336 Cell, 84 Pin, Plastic, PLCC |
| EPF8452ALI84-3 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA) |
| EPF8452ALI84-4 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 8000 42 LABs 68 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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