参数资料
型号: EPM3128ATC144-7
文件页数: 29/53页
文件大小: 839K
代理商: EPM3128ATC144-7
Altera Corporation
35
MAX 3000A Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
These values are specified in Tables 13 through 20 under the recommended operating conditions shown in Table 9
(2)
These values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.1 ns to the PIA timing value.
(3)
This minimum pulse width for preset and clear applies for both global clear and array controls. The tLPA parameter
must be added to this minimum width if the clear or reset signal incorporates the tLAD parameter into the signal
path.
(4)
Measured with a 16-bit loadable, enabled, up/down counter programmed into each LAB.
(5)
The tLPA parameter must be added to the tLAD, tLAC, tIC, tEN, tSEXP, tACL, and tCPPW parameters for macrocells
running in low-power mode.
Power
Consumption
Supply power (P) versus frequency (fMAX, in MHz) for MAX 3000A
devices is calculated with the following equation:
P = PINT + PIO = ICCINT × VCC + PIO
The PIO value, which depends on the device output load characteristics
and switching frequency, can be calculated using the guidelines given in
The ICCINT value depends on the switching frequency and the application
logic. The ICCINT value is calculated with the following equation:
ICCINT =
(A
× MC
TON) + [B × (MCDEV – MCTON)] + (C × MCUSED × fMAX × togLC)
tPIA
PIA delay
1.7
2.4
3.2
ns
tLPA
Low-power adder
4.0
5.0
ns
Table 20. EPM3256A Internal Timing Parameters (Part 2 of 2)
Note (1)
Symbol
Parameter
Conditions
Speed Grade
Unit
-5
-7
-10
Min
Max
Min
Max
Min
Max
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