参数资料
型号: EPM7128AELC84-6
厂商: ALTERA CORP
元件分类: PLD
英文描述: EE PLD, 6 ns, PQCC84
封装: PLASTIC, LCC-84
文件页数: 8/51页
文件大小: 1559K
代理商: EPM7128AELC84-6
610
Altera Corporation
MAX 7000A Programmable Logic Device Family Data Sheet
Preliminary Information
Programming
with External
Hardware
MAX 7000A devices can be programmed on Windows-based PCs with an
Altera Logic Programmer card, the MPU, and the appropriate device
adapter. The MPU performs continuity checking to ensure adequate
electrical contact between the adapter and the device. For more
The MAX+PLUS II software can use text- or waveform-format test vectors
created with the MAX+PLUS II Text Editor or Waveform Editor to test the
programmed device. For added design verification, designers can
perform functional testing to compare the functional device behavior with
the results of simulation.
Data I/O, BP Microsystems, and other programming hardware
manufacturers provide programming support for Altera devices. For
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
MAX 7000A devices include the JTAG BST circuitry defined by IEEE Std.
1149.1-1990. Table 4 describes the JTAG instructions supported by
MAX 7000A devices. The pin-out tables starting on page 634 of this data
sheet show the location of the JTAG control pins for each device. If the
JTAG interface is not required, the JTAG pins are available as user I/O
pins.
Table 4. MAX 7000A JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
EXTEST
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins.
BYPASS
Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation.
IDCODE
Selects the IDCODE register and places it between the TDI and TDO pins, allowing the
IDCODE to be serially shifted out of TDO.
USERCODE
Selects the 32-bit USERCODE register and places it between the TDI and TDO pins,
allowing the USERCODE value to be shifted out of TDO. USERCODE instructions are
available for MAX 7000AE devices only.
UESCODE
These instructions select the user electronic signature (UESCODE) and allow the
UESCODE to be shifted out of TDO. UESCODE instructions are available for EPM7128A
and EPM7256A devices only.
ISP Instructions
These instructions are used when programming MAX 7000A devices via the JTAG ports
with the BitBlaster, ByteBlaster, or ByteBlasterMV download cable, or using a Jam File
(.jam), Jam Byte-Code File (.jbc), or Serial Vector Format File (.svf) via an embedded
processor or test equipment.
相关PDF资料
PDF描述
EPM7128AELI84-6 EE PLD, 6 ns, PQCC84
EPM7064AETC100-5 EE PLD, 5 ns, PQFP100
EPM7064AETC100-6 EE PLD, 6 ns, PQFP100
EPM7128AETC100-4 EE PLD, 4.5 ns, PQFP100
EPM7128AETC100-6 EE PLD, 6 ns, PQFP100
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