参数资料
型号: EPM7128ALC84-10
文件页数: 5/60页
文件大小: 1030K
代理商: EPM7128ALC84-10
Altera Corporation
13
MAX 7000A Programmable Logic Device Data Sheet
Figure 5. MAX 7000A PIA Routing
While the routing delays of channel-based routing schemes in masked or
FPGAs are cumulative, variable, and path-dependent, the MAX 7000A
PIA has a predictable delay. The PIA makes a design’s timing
performance easy to predict.
I/O Control Blocks
The I/O control block allows each I/O pin to be individually configured
for input, output, or bidirectional operation. All I/O pins have a tri-state
buffer that is individually controlled by one of the global output enable
signals or directly connected to ground or VCC. Figure 6 shows the I/O
control block for MAX 7000A devices. The I/O control block has 6 or
10 global output enable signals that are driven by the true or complement
of two output enable signals, a subset of the I/O pins, or a subset of the
I/O macrocells.
To LAB
PIA Signals
相关PDF资料
PDF描述
EPM7128ALC84-12
EPM7128ALC84-6
EPM7128ALC84-7
EPM7128ATC100-10
EPM7128ATC100-12
相关代理商/技术参数
参数描述
EPM7128ALC84-12 制造商:Rochester Electronics LLC 功能描述:- Bulk
EPM7128ALC84-6 制造商:Rochester Electronics LLC 功能描述:- Bulk
EPM7128ALC84-7 制造商:Rochester Electronics LLC 功能描述:- Bulk
EPM7128AT10010 制造商:ALTERA 功能描述:NEW
EPM7128AT1100-10 制造商:Altera Corporation 功能描述: