参数资料
型号: EPM9560RC240-15
文件页数: 11/42页
文件大小: 489K
代理商: EPM9560RC240-15
Altera Corporation
19
MAX 9000 Programmable Logic Device Family Data Sheet
The VCCIO pins can be connected to either a 3.3-V or 5.0-V power supply,
depending on the output requirements. When the VCCIO pins are
connected to a 5.0-V power supply, the output levels are compatible with
5.0-V systems. When the VCCIO pins are connected to a 3.3-V power
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V
or 5.0-V systems. Devices operating with VCCIO levels lower than 4.75 V
incur a nominally greater timing delay of tOD2 instead of tOD1.
In-System
Programma-
bility (ISP)
MAX 9000 devices can be programmed in-system through a 4-pin JTAG
interface. ISP offers quick and efficient iterations during design
development and debug cycles. The MAX 9000 architecture internally
generates the 12.0-V programming voltage required to program EEPROM
cells, eliminating the need for an external 12.0-V power supply to
program the devices on the board. During ISP, the I/O pins are tri-stated
to eliminate board conflicts.
ISP simplifies the manufacturing flow by allowing the devices to be
mounted on a printed circuit board with standard pick-and-place
equipment before they are programmed. MAX 9000 devices can be
programmed by downloading the information via in-circuit testers,
embedded processors, or the Altera BitBlaster, ByteBlaster, or
ByteBlasterMV download cable. (The ByteBlaster cable is obsolete and has
been replaced by the ByteBlasterMV cable, which can interface with 2.5-V,
3.3-V, and 5.0-V devices.) Programming the devices after they are placed
on the board eliminates lead damage on high pin-count packages (e.g.,
QFP packages) due to device handling. MAX 9000 devices can also be
reprogrammed in the field (i.e., product upgrades can be performed in the
field via software or modem).
In-system programming can be accomplished with either an adaptive or
constant algorithm. An adaptive algorithm reads information from the
unit and adapts subsequent programming steps to achieve the fastest
possible programming time for that unit. Because some in-circuit testers
platforms have difficulties supporting an adaptive algorithm, Altera
offers devices tested with a constant algorithm. Devices tested to the
constant algorithm are marked with an “F” suffix in the ordering code.
Programming
with External
Hardware
MAX 9000 devices can be programmed on Windows-based PCs with an
Altera Logic Programmer card, the Master Programming Unit (MPU),
and the appropriate device adapter. The MPU performs continuity
checking to ensure adequate electrical contact between the adapter and
the device.
f For more information, see the Altera Programming Hardware Data Sheet.
相关PDF资料
PDF描述
EPM9560RC240-20
EPM9560RC304-15
EPM9560RI208-15
EPM9560RI208-20
EPM9560RI240-15
相关代理商/技术参数
参数描述
EPM9560RC240-15YY 制造商:Altera Corporation 功能描述:CPLD MAX 9000 Family 12K Gates 560 Macro Cells 117.6MHz CMOS Technology 5V 240-Pin RQFP 制造商:Altera Corporation 功能描述:CPLD MAX 9000 Family 12K Gates 560 Macro Cells 117.6MHz 5V 240-Pin RQFP
EPM9560RC240-20 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX 9000 560 Macro 191 IOs RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
EPM9560RC304-15 制造商:Altera Corporation 功能描述:IC MAX
EPM9560RI208-15 制造商:未知厂家 制造商全称:未知厂家 功能描述:
EPM9560RI208-20 制造商:Altera Corporation 功能描述:IC MAX