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参数资料
| 型号： | ESD0P8RFL E6327 |
| 厂商： | Infineon Technologies |
| 文件页数： | 5/7页 |
| 文件大小： | 0K |
| 描述： | DIODE ESD 12V DUAL TSLP-4 |
| 产品目录绘图： | Circuit |
| 标准包装： | 1 |
| 电压 - 反向隔离（标准值）： | 50V |
| 电极标记： | 双向 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 4-XFDFN |
| 供应商设备封装： | PG-TSLP-4（1.2x0.8） |
| 包装： | 标准包装 |
| 产品目录页面： | 1621 (CN2011-ZH PDF) |
| 其它名称： | ESD0P8RFLE6327INDKR |
ESD0P8RFL
1. Application example
1 RF signal channel, anti-parallel configuration,
please refer also to Application Note No.103
1 protected signal line,
superimposed DC voltage up to
±V F (diode forward volatge)
I/O
ESD
sensitive
circuit
The protection diode should be
placed very close to the location
where the ESD or other transients
can occur to keep loops and
inductances as small as possible.
Grounded pins should be
connected in parallel directly to a
Line to ground capacitance
0.8 pF @1 GHz
2. Application example
1 RF signal channel, rail-to-rail configuration
1 protected signal line,
ground plane on the board.
superimposed DC voltage up to
+Vcc (voltage supply)
I/O
ESD
sensitive
circuit
Cathode of one diode should be
connected to the positive supply
voltage +Vcc and anode of the
opposite diode should be
connected directly to a ground
plane on the board. Clamped
+Vcc
Line to ground capacitance
0.8 pF @1 GHz
5
input voltage at I/O port is limited
to Vcc + VF at positive transients
and 0V - VF at negative transients
(VF ... diode forward voltage
drop).
2011-06-27
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