参数资料
| 型号： | EV6R11S6 |
| 厂商： | IXYS |
| 文件页数： | 3/7页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION IX6R11S6 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，半 H 桥驱动器（外部 FET） |
| 已用 IC / 零件： | IX6R11S6 |
| 已供物品： | 板 |
| 相关产品： | IX6R11S6T/R-ND - IC DRVR HALF BRIDGE 4A 18-SOIC IX6R11S6-ND - IC BRIDGE DRIVER FOR N-CH MOSFET |
EV6R11 KIT
ASSEMBLY:
Figure 3 is a complete schematic diagram of the
design kit. This schematic indicates an applica-
tion using MOSFETs. When IGBTs are used,
freewheeling diodes (D2&D3) are typically
added.
To operate the PCB, simply solder the included
MOSFET power devices and C9 or install de-
vices specific to your application. Note gate drain
source pin orientation of power devices when
installing on the PCB. C9 has not been installed
due to its high profile and possible lead damage.
NOTES:
a) The ICs and Power devices are static sensi-
tive and require special handling.
b) Use any power device that is suitable for your
application. The PCB was designed to accept
devices with TO-247 or TO-264 packages. Two
IXYS power devices are included in the kit. D2
and D3 are required only if Q1 and Q2 are IGBTs,
and thus are not included in the kit. (A recom-
mendation for D2 & D3 is in the Bill of Materials).
c) Use any convenient method of interconnec-
tion at LS_GND, Q1-D, Q2-S, DC_BUS. The
hole spacing is 5.08mm and will fit most com-
mon terminal blocks. (A recommendation for a
connector that the PCB will accept is in the Bill
of Materials and is available from Digi-Key
among other sources).
d) For half bridge applications, insert a jumper
between Q1-D and Q2-S.
e) The gate resistors, R1 and R2, will depend on
the power device size that is used. 5.11 Ohm
resistors are installed and should work for most
applications.
f) IXDP630 dead time is provided by timing
components R3 and C5 and is fixed at roughly
1 microsecond. See the IXDP630 data sheet for
calculation and modification of the dead time
value. It must also be noted that dead time starts
to impact drive signals as drive frequency goes
3
up. Jitter is then produced as drive signal 'On'
time overlaps into dead time. A practical limit in
values are soon reached with timing compo-
nents R3 and C5 as they are adjusted to com-
pensate for the reduced period in drive frequency.
It is possible to 'overdrive' the IXDP630 with an
external clock signal applied to pin 10 to reduce
dead time even further than what is possible with
R3 and C5. To do this, remove R3, C5 from the
board and install a 50 Ohm load resistor at
position R10. Solder pads have been provided
at R10 to solder the ends of a coax cable directly
to the board. The IXDP630 can be driven in
excess of 50MHz.
g) The IXDP630 dead time generator is a 5V
HCMOS device. The addition of the IXDP630 on
the evaluation board is in part for convenience in
providing dual complementary drive signals. The
IXDP631 is a performance extension of the
IXDP630 and can be added as desired by the
user. However there is no part number available
for a IXDP631 loaded evaluation board and the
user must request IXDP631 samples separately.
Please note that threshold levels must be ob-
served when selecting the front end logic Vdd
supply voltage. To increase threshold level flex-
ibility, this PCB incorporates a level translation
circuit with Q3 and Q4. As configured, a three
terminal +5V regulator, U1, supplies power to
the IXDP630 and translator circuit which implies
that Vdd should be greater than 8V to prevent
regulator drop-out. Please note that this is only
one way to configure the board and was chosen
to provide a fast, easy way to get started during
the design stage.
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