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| 型号： | EVAL-AD5433EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 14/29页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5433 |
| 产品培训模块： | DAC Architectures |
| 标准包装： | 1 |
| DAC 的数量： | 1 |
| 位数： | 10 |
| 采样率（每秒）： | 20.4M |
| 数据接口： | 并联 |
| 设置时间： | 35ns |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 125°C |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD5433 |
| 相关产品： | AD5433YRUZ-ND - IC DAC 10BIT MULTIPLYING 20TSSOP AD5433YCPZ-ND - IC DAC 10BIT MULTIPLYING 20LFCSP AD5433YRUZ-REEL7-ND - IC DAC 10BIT MULTIPLYING 20TSSOP AD5433YRUZ-REEL-ND - IC DAC 10BIT MULTIPLYING 20TSSOP AD5433YRU-REEL-ND - IC DAC 10BIT MULTIPLYING 20TSSOP AD5433YRU-ND - IC DAC 10BIT MULTIPLYING 20TSSOP |
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AD5424/AD5433/AD5445
Data Sheet
Rev. D | Page 20 of 28
SINGLE-SUPPLY APPLICATIONS
Current Mode Operation
The current mode circuit in Figure 51 shows a typical circuit for
operation with a single 2.5 V to 5 V supply. IOUT2 and therefore
IOUT1 is biased positive by the amount applied to VBIAS. In this
configuration, the output voltage is given by
VOUT = [D × (RFB/RDAC) × (VBIAS VIN)] + VBIAS
or 0 to 4095 (AD5445), the output voltage varies from
VOUT = VBIAS to VOUT = 2VBIAS VIN
VBIAS should be a low impedance source capable of sinking and
sourcing all possible variations in current at the IOUT2 terminal.
03160-051
ADDITIONAL PINS OMITTED FOR CLARITY
C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
NOTES:
1.
2.
VDD
VIN
VREF
GND
DAC
C1
A1
RFB
IOUT1
IOUT2
VBIAS
VOUT
Figure 51. Single-Supply Current Mode Operation
It is important to note that VIN is limited to low voltages because
the switches in the DAC ladder no longer have the same source-
drain drive voltage. As a result, there on resistance differs and
the linearity of the DAC degrades.
Voltage Switching Mode of Operation
Figure 52 shows these DACs operating in the voltage-switching
mode. The reference voltage, VIN, is applied to the IOUT1 pin,
IOUT2 is connected to AGND, and the output voltage is available
at the VREF terminal. In this configuration, a positive reference
voltage results in a positive output voltage, making single-supply
operation possible. The output from the DAC is a voltage at a
constant impedance (the DAC ladder resistance), thus an op
amp is necessary to buffer the output voltage. The reference
input no longer sees a constant input impedance, but one that
varies with code. Therefore, the voltage input should be driven
from a low impedance source.
03160-052
VIN
VDD
VREF
VOUT
GND
DAC
RFB
IOUT1
IOUT2
R1
A1
R2
ADDITIONAL PINS OMITTED FOR CLARITY
C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
NOTES:
1.
2.
Figure 52. Single-Supply Voltage-Switching Mode Operation
It is important to note that VIN is limited to low voltages because
the switches in the DAC ladder no longer have the same source-
drain drive voltage. As a result, there on resistance differs, which
degrades the linearity of the DAC. See Figure 18 to Figure 23. Also,
VIN must not go negative by more than 0.3 V; otherwise, an internal
diode turns on, exceeding the maximum ratings of the device.
In this type of application, the full range of multiplying capability
of the DAC is lost.
POSITIVE OUTPUT VOLTAGE
Note that the output voltage polarity is opposite to the VREF
polarity for dc reference voltages. To achieve a positive voltage
output, an applied negative reference to the input of the DAC is
preferred over the output inversion through an inverting amplifier
because of the resistor tolerance errors. To generate a negative
reference, the reference can be level-shifted by an op amp such
that the VOUT and GND pins of the reference become the virtual
ground and –2.5 V respectively, as shown in Figure 53.
VDD
RFB
IOUT1
IOUT2
C1
VOUT = 0V TO +2.5V
GND
VDD = 5V
VREF
NOTES:
1ADDITIONAL PINS OMITTED FOR CLARITY.
2C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED,
IF A1 IS A HIGH SPEED AMPLIFIER.
ADR03
VOUT
VIN
GND
–5V
+5V
–2.5V
03160-053
Figure 53. Positive Voltage Output with Minimum of Components
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