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| 型号： | EVAL-AD5755-1SDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 23/52页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5755-1 |
| 视频文件： | AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC |
| 标准包装： | 1 |
| DAC 的数量： | 4 |
| 位数： | 16 |
| 数据接口： | 串行 |
| 设置时间： | 11µs |
| DAC 型： | 电流/电压 |
| 工作温度： | -40°C ~ 105°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | * |
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Data Sheet
AD5755-1
Rev. E | Page 3 of 52
REVISION HISTORY
11/12—Rev. D to Rev. E
Changes to Figure 2...........................................................................4
Changed Thermal Impedance from 20°C/W to 28°C/W..........12
Changes to Pin 6 Description........................................................13
Changes to Pin 27 Description......................................................14
Changes to Figure 26 ......................................................................19
Changes to DUT_AD1, DUT_AD0 Description, Table 9 .........33
Changes to Packet Error Checking Section and Internal
Reference Section ............................................................................41
Changes to Figure 81 ......................................................................43
Changes to Figure 86 ......................................................................47
Changes to Figure 89 ......................................................................49
7/12—Rev. C to Rev. D
Changes to Figure 89 ......................................................................49
Updated Outline Dimensions........................................................50
5/12—Rev. B to Rev. C
Changes to Companion Products Section.....................................1
Changes to Figure 2...........................................................................3
Changes to Table 5 ..........................................................................15
Changes to Figure 22 ......................................................................18
Added Industrial HART Capable Analog Output Application—
Shared VOUT_x and IOUT_X Pin Section and Figure 89,
Renumbered Sequentially ..............................................................49
Updated Outline Dimensions........................................................50
11/11—Rev. A to Rev. B
Removed Voltage Output Test Conditions/Comments, Table 1....5
Changed Headroom and Footroom Test Conditions/Comments,
Table 1..............................................................................................................5
Changes to Figure 4 ........................................................................10
Changes to Figure 5 ........................................................................11
Changes to SCLK Description, Table 5 ........................................13
Changes to Figure 12 ......................................................................16
Changes to Figure 21 ......................................................................18
Changes to Figure 37 ......................................................................20
Changes to Figure 44 ......................................................................22
Changes to Figure 71 ......................................................................29
Changes to Power-On State of the AD5755-1 Section...............30
Changes to Table 17 ........................................................................35
Changes to Readback Operation section and Table 26..............38
Changes to Voltage Output Short-Circuit Protection Section..40
Changes to Figure 78 ......................................................................41
Changes to Figure 82 ......................................................................44
Changes to Figure 83, Figure 84, and Figure 85..................................45
Changes to Transient Voltage Protection Section and Figure 86 ...47
Changes to Galvanically Isolated Interface Section....................48
5/11—Rev. 0 to Rev. A
Removed Endnote 6 (Table 1) .........................................................6
Changed AVDD Minimum Value from 10.8 V to 9 V ...................6
Changed AISS Minimum Value from 1.4 mA to 1.7 mA.........7
Changed AVDD Voltage in Pin 19 Description ............................13
Changes to Ordering Guide...........................................................48
4/11—Revision 0: Initial Version
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