参数资料
型号: EVAL-AD7401EDZ
厂商: Analog Devices Inc
文件页数: 14/20页
文件大小: 0K
描述: BOARD EVALUATION FOR AD7401
标准包装: 1
系列: iCoupler®
ADC 的数量: 1
位数: 16
采样率(每秒): 20M
数据接口: 串行
输入范围: ±320 mV
在以下条件下的电源(标准): 100mW @ 20MSPS
工作温度: -40°C ~ 105°C
已用 IC / 零件: AD7401
已供物品:
AD7401
Rev. D | Page 3 of 20
SPECIFICATIONS
VDD1 = 4.5 V to 5.25 V, VDD2 = 3 V to 5.5 V, VIN+ = 200 mV to +200 mV, and VIN = 0 V (single-ended); TA = TMIN to TMAX,
fMCLK = 16 MHz maximum, tested with Sinc3 filter, 256 decimation rate, as defined by Verilog code, unless otherwise noted.
Table 1.
Parameter
Y Version1, 2
Unit
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
16
Bits min
Filter output truncated to 16 bits
±15
LSB max
±25
LSB max
±55
LSB max
±0.9
LSB max
±0.6
mV max
±50
μV typ
TA = 25°C
3.5
μV/°C max
40°C to +105°C
1
μV/°C typ
120
μV/V typ
±1.6
mV max
40°C to +85°C
±2
mV max
>85°C to 105°C
±1
mV typ
Gain Error Drift vs. Temperature
23
μV/°C typ
40°C to +105°C
Gain Error Drift vs. VDD1
110
μV/V typ
ANALOG INPUT
Input Voltage Range
±200
mV min/mV max
For specified performance; full range ±320 mV
Dynamic Input Current
±9
μA max
VIN+ = 400 mV, VIN = 0 V
DC Leakage Current
±0.5
μA max
Input Capacitance
10
pF typ
DYNAMIC SPECIFICATIONS
VIN+ = 5 kHz, 400 mV p-p sine
70
dB min
68
dB min
40°C to +85°C; fMCLK = 5 MHz to <9 MHz
65
dB min
>85°C to 105°C
65
dB min
fMCLK = 20 MHz maximum4; VIN+ = 250 mV to +250 mV
81
dB typ
80
dB min
40°C to +105°C; 82 dB typ
80
dB min
fMCLK = 20 MHz maximum4; VIN+ = 250 mV to +250 mV
92
dB typ
fMCLK = 20 MHz maximum4; VIN+ = 250 mV to +250 mV
92
dB typ
11.5
Bits
25
kV/μs min
30
kV/μs typ
LOGIC INPUTS
Input High Voltage, VIH
0.8 × VDD2
V min
Input Low Voltage, VIL
0.2 × VDD2
V max
Input Current, IIN
±0.5
μA max
10
pF max
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