- 您现在的位置：买卖IC网 > PDF目录17031 > EVAL-AD7654CBZ (Analog Devices Inc)BOARD EVALUATION FOR AD7654 PDF资料下载
参数资料
| 型号： | EVAL-AD7654CBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 27/28页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD7654 |
| 标准包装： | 1 |
| 系列： | PulSAR® |
| ADC 的数量： | 2 |
| 位数： | 16 |
| 采样率（每秒）： | 500k |
| 数据接口： | 串行，并联 |
| 输入范围： | 0 ~ 5 V |
| 在以下条件下的电源（标准）： | 120mW @ 500kSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7654 |
| 已供物品： | 板 |
| 相关产品： | AD7654ACPZ-ND - IC ADC 16BIT DUAL 2CH 48-LFCSP AD7654ASTZRL-ND - IC ADC 16BIT DUAL 2CH 48LQFP AD7654ACPZRL-ND - IC ADC 16BIT DUAL 2CH 48LFCSP AD7654ASTZ-ND - IC ADC 16BIT 500KSPS DUAL 48LQFP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页当前第27页第28页
AD7654
Rev. B | Page 8 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
48
AG
ND
47
AG
ND
46
IN
A
1
45
IN
A
N
44
IN
A
2
43
RE
F
A
42
RE
F
B
41
IN
B
2
40
IN
B
N
39
IN
B
1
38
RE
F
G
N
D
37
RE
F
35
CNVST
34
PD
33
RESET
30
EOC
31
RD
32
CS
36
DVDD
29
BUSY
28
D15
27
D14
25
D12
26
D13
2
AVDD
3
A0
4
BYTESWAP
7
IMPULSE
6
DGND
5
A/B
1
AGND
8
SER/PAR
9
D0
10
D1
12
D3/DIVSCLK[1]
11
D2/DIVSCLK[0]
13
D
4/E
X
T
/IN
T
14
D
5/
IN
VS
YN
C
15
D6/
INV
S
C
L
K
16
D7/
RDC/
S
D
IN
17
OGN
D
18
OV
D
19
DV
D
20
DG
ND
21
D8/
S
DO
UT
22
D9/
S
CL
K
23
D10/
S
Y
NC
24
D
11/
RDE
R
O
R
PIN 1
AD7654
TOP VIEW
(Not to Scale)
03
05
7-
0
04
Figure 4. 48-Lead LQFP (ST-48) and 48-Lead LFCSP (CP-48)
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Type1
Description
1, 47, 48
AGND
P
Analog Power Ground Pin.
2
AVDD
P
Input Analog Power Pin. Nominally 5 V.
3
A0
DI
Multiplexer Select. When LOW, the analog inputs INA1 and INB1 are sampled simultaneously, then
converted. When HIGH, the analog inputs INA2 and INB2 are sampled simultaneously, then converted.
4
BYTESWAP
DI
Parallel Mode Selection (8 bit, 16 bit). When LOW, the LSB is output on D[7:0] and the MSB is output on
D[15:8]. When HIGH, the LSB is output on D[15:8] and the MSB is output on D[7:0].
5
A/B
DI
Data Channel Selection. In parallel mode, when LOW, the data from Channel B is read. When HIGH, the
data from Channel A is read. In serial mode, when HIGH, Channel A is output first followed by Channel
B. When LOW, Channel B is output first followed by Channel A.
6, 20
DGND
P
Digital Power Ground.
7
IMPULSE
DI
Mode Selection. When HIGH, this input selects a reduced power mode. In this mode, the power
dissipation is approximately proportional to the sampling rate.
8
SER/PAR
DI
Serial/Parallel Selection Input. When LOW, the parallel port is selected; when HIGH, the serial interface
mode is selected and some bits of the DATA bus are used as a serial port.
9, 10
D[0:1]
DO
Bit 0 and Bit 1 of the Parallel Port Data Output Bus. When SER/PAR is HIGH, these outputs are in high
impedance.
11, 12
D[2:3] or
DI/O
When SER/PAR is LOW, these outputs are used as Bit 2 and Bit 3 of the parallel port data output bus.
DIVSCLK[0:1]
When SER/PAR is HIGH, EXT/INT is LOW, and RDC/SDIN is LOW, which is the serial master read after
convert mode, these inputs, part of the serial port, are used to slow down if desired the internal serial
clock that clocks the data output. In the other serial modes, these inputs are not used.
13
D[4]
DI/O
When SER/PARis LOW, this output is used as Bit 4 of the parallel port data output bus.
or EXT/INT
When SER/PARis HIGH, this input, part of the serial port, is used as a digital select input for choosing
the internal or an external data clock, called respectively, master and slave mode. With EXT/INT tied
LOW, the internal clock is selected on SCLK output. With EXT/INT set to a logic HIGH, output data is
synchronized to an external clock signal connected to the SCLK input.
14
D[5]
DI/O
When SER/PAR is LOW, this output is used as Bit 5 of the parallel port data output bus.
or INVSYNC
When SER/PAR is HIGH, this input, part of the serial port, is used to select the active state of the SYNC
signal in Master modes. When LOW, SYNC is active HIGH. When HIGH, SYNC is active LOW.
相关PDF资料 |
PDF描述 |
|---|---|
| STD17W-P | WIRE & CABLE MARKERS |
| EVAL-AD7653CBZ | BOARD EVALUATION FOR AD7653 |
| MLG1005S30NJ | INDUCTOR MULTILAYER 30NH 0402 |
| EVAL-AD7643CBZ | BOARD EVALUATION FOR AD7643 |
| STD17W-C | WIRE & CABLE MARKERS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EVAL-AD7655CB | 制造商:Analog Devices 功能描述:Evaluation Board For The 48 Lead Pulsar Analog To Digital Converter Family 制造商:Rochester Electronics LLC 功能描述:EVAL BRD LOW COST 4-CH 1 MSPS 16-BIT ADC - Bulk |
| EVAL-AD7655CBZ | 功能描述:BOARD EVALUATION FOR AD7655 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:PulSAR® 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD7655EDZ | 功能描述:BOARD EVAL FOR AD7655 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD7656-1CBZ | 功能描述:BOARD EVAL FOR AD7656-1 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:iCMOS® 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD7656-1EDZ | 功能描述:BOARD EVAL CONTROL AD7656-1 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:iCMOS® 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
发布紧急采购，3分钟左右您将得到回复。