参数资料
| 型号： | EVAL-AD7741/42EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/12页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7741/7742 |
| 标准包装： | 1 |
| 主要目的： | 接口，电压至频率 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD7741，AD7742 |
| 主要属性： | 2 个设备：第 1 个带 0~2.5 V 单端输入，第 2 个带 2 个 0~3.5 V 差分输入 |
| 次要属性： | 3072kHz 全量程内部/外部基准选项 |
| 已供物品： | 板 |
| 相关产品： | AD7741YRZ-ND - IC CONVERTER VOLT TO FREQ 8SOIC AD7741BNZ-ND - IC CONVERTER VOLT TO FREQ 8DIP AD7741BRZ-REEL7-ND - IC CONVERTER VOLT TO FREQ 8SOIC AD7741BRZ-REEL-ND - IC CONVERTER VOLT TO FREQ 8SOIC AD7741BRZ-ND - IC CONVERTER V TO FREQ 8-SOIC AD7741YR-REEL7-ND - IC CONVERTER V TO FREQ 8-SOIC AD7741YR-REEL-ND - IC CONVERTER V TO FREQ 8-SOIC AD7741BR-REEL7-ND - IC CONVERTER V TO FREQ 8-SOIC AD7741BR-REEL-ND - IC CONVERTER V TO FREQ 8-SOIC AD7741BR-ND - IC CONVERTER V TO FREQ 8-SOIC |
AD7741/AD7742
AD7742 PIN FUNCTION DESCRIPTION
Pin No.
1
2
3
4–5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
f OUT
V DD
GND
A1, A0
CLKOUT
CLKIN
UNI/ BIP
REFOUT
REFIN
V IN 1
V IN 2
V IN 3
V IN 4
GAIN
PD
Function
Frequency Output. This pin provides the output of the synchronous VFC.
Power Supply Input. These parts can be operated from +4.75 V to +5.25 V and the supply should be
adequately decoupled to GND.
Ground reference point for all circuitry on the part.
Address Inputs used to select the input channel configuration.
External Clock Output. When the master clock for the device is a crystal, the crystal is connected be-
tween CLKIN and CLKOUT. When an external clock is applied to CLKIN, the CLKOUT pin
provides an inverted clock signal. This clock should be buffered if it is to be used as a clock source
elsewhere in the system.
External Clock Input. The master clock for the device can be provided in the form of a crystal or an
external clock. A crystal may be tied across the CLKIN and CLKOUT pins. Alternatively, the CLKIN
pin may be driven by a CMOS-compatible clock and CLKOUT left unconnected. The frequency of the
master clock may be as high as 6 MHz.
Control input which determines whether the device operates with differential bipolar analog input
signals or differential unipolar analog input signals.
2.5 V Voltage Reference Output. This can be tied directly to REFIN. It may also be used as a reference
to other parts of the system provided it is buffered first.
This is the Reference Input to the core of the VFC and defines the span of the VFC. A 2.5 V reference
is required at this pin. This may be provided by connecting it directly to REFOUT or by using a preci-
sion external reference (e.g., REF192).
Buffered Analog Input Channel 1. This is either a pseudo-differential input with respect to V IN 4 or it is
the positive input of a truly-differential input pair with respect to V IN 2.
Buffered Analog Input Channel 2. This is either a pseudo-differential input with respect to V IN 4 or it is
the negative input of a truly-differential input pair with respect to V IN 1.
Buffered Analog Input Channel 3. This is the positive input of a truly-differential input pair with re-
spect to V IN 4.
Buffered Analog Input Channel 4. This is either the common for pseudo-differential input with respect
to V IN 1 or V IN 2 or it is the negative input of a truly-differential input pair with respect to V IN 3.
Gain Select input that controls whether the gain on the analog front-end is X1 or X2.
Active Low Power-Down pin. When this input is low, the part enters power-down mode where it typi-
cally consumes 25 μ A of current.
PIN CONFIGURATION
16 PD
f OUT 1
V DD 2
15 GAIN
GND 3
14 V IN 4
A1 4
AD7742
13 V IN 3
TOP VIEW
A0 5 (Not to Scale) 12 V IN 2
CLKOUT 6
CLKIN 7
11 V IN 1
10 REFIN
UNI/ BIP 8
–6 –
9
REFOUT
REV. 0
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