参数资料
型号: EVAL-AD7767-2EDZ
厂商: Analog Devices Inc
文件页数: 15/25页
文件大小: 0K
描述: BOARD EVALUATION FOR AD7767
标准包装: 1
ADC 的数量: 1
位数: 24
采样率(每秒): 32k
数据接口: 串行
输入范围: ±VREF
在以下条件下的电源(标准): 8.5mW @ 32kSPS
工作温度: -40°C ~ 105°C
已用 IC / 零件: AD7767-2
已供物品: 板,CD
其它名称: Q3407966
AD7767
Rev. C | Page 21 of 2
4
ANTIALIASING
The AD7767/AD7767-1/AD7767-2 sample the analog input
at a maximum rate of 1.024 MHz. The on-board digital filter
provides up to 100 dB attenuation for any possible aliasing
frequency in the range from the beginning of the filter stop
band (0.547 × ODR) to where the image of the digital filter pass
band occurs. This occurs at MCLK minus the filter stop band
(MCLK 0.547 × ODR), as shown in Figure 42.
06
85
9-
2
31
DIGITAL FILTER 100dB
ANTIALIAS PROTECTION
fMCLK
BAND OF INTEREST
fMCLK – (0.547 × ODR)
FIRST IMAGE POINT
DIGITAL FILTER
IMAGE AT
fMCLK
Figure 42. AD7767/AD7767-1/AD7767 Spectrum
Table 9 shows the attenuation achieved by various orders of
front-end antialias filters prior to the signal entering the AD7767/
AD7767-1/AD7767-2 at the image of the digital filter stop band,
which is 1.024 MHz 0.547 × ODR.
Table 9. Antialias Filter Order,
Attenuation at at First Image Point
Model
Filter Order
Attenuation at
1.024 MHz – 0.547 × ODR
AD7767
First
27 dB
Second
50 dB
Third
70 dB
AD7767-1
First
33 dB
Second
62 dB
Third
89 dB
AD7767-2
First
38 dB
Second
74 dB
Third
110 dB
The AD7764 and AD7765 ∑-Δ devices are available to
customers that require extra antialias protection. These devices
sample the signal internally at a rate of 20 MHz to achieve up to
a maximum of 156 kHz or 312 kHz output data rate. This
means that the first alias point of these devices when run at the
maximum speeds is 19.921 MHz and 19.843 MHz, respectively.
POWER DISSIPATION
The AD7767/AD7767-1/AD7767-2 offer exceptional perform-
ance at ultralow power. Figure 43, Figure 44, and Figure 45
show how the current consumption of the AD7767/AD7767-1/
AD7767-2 scales with the MCLK frequency applied to the device.
Both the digital and analog currents scale as the MCLK frequency
is reduced. The actual throughput equals the MCLK frequency
applied divided by the decimation rate employed by the device
in use. For instance, operating the AD7767 device with an MCLK
of 800 kHz results in an output data rate of 100 kHz due to the
decimate-by-8 filtering.
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1000k
900k
800k
700k
600k
500k
400k
300k
200k
100k
CUR
RE
NT
(
m
A)
FREQUENCY (Hz)
06
85
9-
2
26
IREF
AIDD
DIDD
Figure 43. AD7767 Current vs. MCLK Frequency
2.5
2.0
1.5
1.0
0.5
0
1000k
900k
800k
700k
600k
500k
400k
300k
200k
100k
CUR
RE
NT
(
m
A)
FREQUENCY (Hz)
06
85
9-
2
27
IREF
AIDD
DIDD
Figure 44. AD7767-1 Current vs. MCLK Frequency
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1000k
900k
800k
700k
600k
500k
400k
300k
200k
100k
CUR
RE
NT
(
m
A)
FREQUENCY (Hz)
06
85
9-
2
28
IREF
AIDD
DIDD
Figure 45. AD7767-2 Current vs. MCLK Frequency
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