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参数资料
| 型号： | EVAL-ADAU1401EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/52页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADAU1401 |
| 标准包装： | 1 |
| 系列： | SigmaDSP® |
| 主要目的： | 音频编解码器 |
| 嵌入式： | 是，DSP |
| 已用 IC / 零件： | ADAU1401 |
| 主要属性： | 在 50-MIPS 时的 28/56 位音频处理器，2 ADC，4 DAC |
| 次要属性： | 均衡，交叉，低音增强，多频带动态处理，延迟等 |
| 已供物品： | 2 个板，线缆，电源 |
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ADAU1401
Data Sheet
Rev. C | Page 26 of 52
I2C Read and Write Operations
Figure 22 shows the timing of a single-word write operation.
Every ninth clock, the ADAU1401 issues an acknowledge by
pulling SDA low.
Figure 23 shows the timing of a burst mode write sequence.
This figure shows an example where the target destination
registers are two bytes. The ADAU1401 knows to increment its
subaddress register every two bytes because the requested
subaddress corresponds to a register or memory area with a
2-byte word length.
The timing of a single-word read operation is shown in
Figure 24. Note that the first R/W bit is 0, indicating a write
operation. This is because the subaddress still needs to be
written to set up the internal address. After the ADAU1401
acknowledges the receipt of the subaddress, the master must
issue a repeated start command followed by the chip address
byte with the R/W set to 1 (read). This causes the ADAU1401
SDA to reverse and begin driving data back to the master. The
master then responds every ninth pulse with an acknowledge
pulse to the ADAU1401.
Figure 25 shows the timing of a burst mode read sequence. This
figure shows an example where the target read registers are two
bytes. The ADAU1401 increments its subaddress every two bytes
because the requested subaddress corresponds to a register or
memory area with word lengths of two bytes. Other addresses
may have word lengths ranging from one to five bytes. The
ADAU1401 always decodes the subaddress and sets the auto-
increment circuit so that the address increments after the
appropriate number of bytes.
S = start bit
P = stop bit
AM = acknowledge by master
AS = acknowledge by slave
S
AS
SUBADDRESS
LOW
DATA BYTE 1
DATA BYTE 2
AS
P
DATA BYTE N
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
067
52-
02
2
Figure 22. Single Word I2C Write Format
S
AS
SUBADDRESS
LOW
DATA-
WORD 1,
BYTE 1
DATA-
WORD 1,
BYTE 2
DATA-
WORD 2,
BYTE 1
DATA-
WORD 2,
BYTE 2
AS
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
06
75
2-
02
3
Figure 23. Burst Mode I2C Write Format
06
75
2-
0
24
S
AS
S
SUBADDRESS
LOW
AM
AS
DATA
BYTE 1
DATA
BYTE 2
DATA
BYTE N
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
CHIP ADDRESS,
R/W = 1
Figure 24. Single-Word I2C Read Format
06
752
-0
25
S
AS
S
SUBADDRESS
LOW
AM
AS
DATA-
WORD 1,
BYTE 1
AM
DATA-
WORD 1,
BYTE 2
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
CHIP ADDRESS,
R/W = 1
Figure 25. Burst Mode I2C Read Format
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EVAL-ADAU1401-EBZ | 制造商:Analog Devices 功能描述:EVALUATION KIT ((NS)) |
| EVAL-ADAU1442EBZ | 功能描述:BOARD EVAL FOR ADAU1442 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:SigmaDSP® 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
| EVAL-ADAU1446EBZ | 功能描述:BOARD EVAL FOR ADAU1446 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:SigmaDSP® 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
| EVAL-ADAU1590EBZ | 制造商:Analog Devices 功能描述:EVAL BOARD - Bulk |
| EVAL-ADAU1592EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For ADAU1592 制造商:Analog Devices 功能描述:EVAL BOARD - Boxed Product (Development Kits) |
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