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参数资料
| 型号： | EVAL-ADCMP566BCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 14/16页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION ADCMP566BPZ |
| 标准包装： | 1 |
| 主要目的： | 接口，比较器 |
| 已用 IC / 零件： | ADCMP566BPZ |
| 已供物品： | 板 |
| 相关产品： | ADCMP566BCPZ-ND - IC COMP DUAL ULTRA-FAST 32LFCSP |
ADCMP566
Rev. 0 | Page 7 of 16
Pin No.
Mnemonic
Function
22
VEE
Negative Supply Terminal
23
NC
No Connect. Leave pin unconnected.
24
VEE
Negative Supply Terminal
25
GND
Digital Ground
26
QA
One of two complementary outputs for Channel A. QA will be at logic high if the analog voltage at the
noninverting input is greater than the analog voltage at the inverting input (provided the comparator is
in the compare mode). See the LEA description (Pin 30) for more information.
27
QA
One of two complementary outputs for Channel A. QA will be at logic low if the analog voltage at the
noninverting input is greater than the analog voltage at the inverting input (provided the comparator is
in the compare mode). See the LEA description (Pin 30) for more information.
28
GND
Digital Ground
29
NC
No Connect. Leave pin unconnected.
30
LEA
One of two complementary inputs for Channel A Latch Enable. In the compare mode (logic high), the
output will track changes at the input of the comparator. In the latch mode (logic low), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEA must be driven
in conjunction with LEA.
31
LEA
One of two complementary inputs for Channel A Latch Enable. In the compare mode (logic low), the
output will track changes at the input of the comparator. In the latch mode (logic high), the output will
reflect the input state just prior to the comparator’s being placed in the latch mode. LEA must be driven
in conjunction with LEA.
32
GND
Analog Ground
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