参数资料
| 型号： | EVAL-ADE7878EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 30/100页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADE7878 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电度表/功率表 |
| 嵌入式： | 是，DSP |
| 已用 IC / 零件： | ADE7878 |
| 次要属性： | USB 接口 |
| 已供物品： | 板 |
| 其它名称： | Q4472972 Q4684026 Q5015773 |
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ADE7854/ADE7858/ADE7868/ADE7878
Data Sheet
ZX SIGNAL
LPF1
ZX DETECTION
0x5A7540 =
DATA RANGE
CURRENT PEAK,
OVERCURRENT
DETECT
+5,928,256
IAP
PGA1 BITS
GAIN[2:0]
×1, ×2, ×4, ×8, ×16
REFERENCE
DSP
HPFDIS
[23:0]
INTEN BIT
CONFIG[0]
DIGITAL
INTEGRATOR
AIGAIN[23:0]
CURRENT RMS (IRMS)
CALCULATION
IAWV WAVEFORM
SAMPLE REGISTER
0V
0xA58AC0 =
–5,928,256
TOTAL/FUNDAMENTAL
V IN
PGA1
ADC
HPF
ACTIVE AND REACTIVE
POWER CALCULATION
IAN
CURRENT CHANNE L
V IN
+0.5V/GAIN
0V
–0.5V/GAIN
0x5A7540 =
+5,928,256
0V
0xA58AC0 =
CURRENT CHANNE L
DATA RANGE
0x5A7540 =
+5,928,256
0V
0xA58AC0 =
DATA RANGE AFTER
INTEGRATION
ANALOG INPUT RANGE
–5,928,256
ADC OUTPUT RANGE
–5,928,256
Figure 33. Current Channel Signal Path
DSP
INTEN BIT
CONFIG[0]
INP
V IN
PGA2 BITS
GAIN[5:3]
×1, ×2, ×4, ×8, ×16
PGA2
REFERENCE
ADC
HPFDIS
[23:0]
HPF
DIGITAL
INTEGRATOR
NIGAIN[23:0]
CURRENT RMS (IRMS)
CALCULATION
INWV WAVEFORM
SAMPLE REGISTER
INN
Figure 34. Neutral Current Signal Path ( ADE7868 , ADE7878 Only)
Current Waveform Gain Registers
There is a multiplier in the signal path of each phase and
most significant bits (MSBs) padded with 0s and sign extended
to 28 bits. See Figure 35 for details.
neutral current. The current waveform can be changed by
±100% by writing a corresponding twos complement number
31
0000
28 27
24 23
24-BIT NUMBER
0
to the 24-bit signed current waveform gain registers (AIGAIN,
BIGAIN, CIGAIN, and NIGAIN). For example, if 0x400000 is
BITS[27:24] ARE
EQUAL TO BIT 23
BIT 23 IS A SIGN BIT
written to those registers, the ADC output is scaled up by 50%.
To scale the input by ?50%, write 0xC00000 to the registers.
Equation 3 describes mathematically the function of the current
waveform gain registers.
Figure 35. 24-Bit xIGAIN Transmitted as 32-Bit Words
Current Channel HPF
The ADC outputs can contain a dc offset. This offset can create
??
ADC Output ? ?? 1 ?
Current Waveform =
? Content of Current Gain Register ?
? 2 23 ?
(3)
errors in power and rms calculations. High-pass filters (HPFs)
are placed in the signal path of the phase and neutral currents
and of the phase voltages. If enabled, the HPF eliminates any dc
offset on the current channel. All filters are implemented in the
Changing the content of the AIGAIN, BIGAIN, CIGAIN, or
INGAIN registers affects all calculations based on its current;
that is, it affects the corresponding phase active/reactive/
apparent energy and current rms calculation. In addition,
waveform samples scale accordingly.
and/or ADE7878 work on 32-, 16-, or 8-bit words, and the DSP
DSP and, by default, they are all enabled: the 24-bit HPFDIS
register is cleared to 0x00000000. All filters are disabled by
setting HPFDIS to any nonzero value.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE78xx work on 32-, 16-, or 8-bit words.
The HPFDIS register is accessed as a 32-bit register with eight
MSBs padded with 0s. See Figure 36 for details.
works on 28 bits. The 24-bit AIGAIN, BIGAIN, CIGAIN, and
NIGAIN registers are accessed as 32-bit registers with the four
31
0000
0000
24
23
24-BIT NUMBER
0
Figure 36. 24-Bit HPFDIS Register Transmitted as 32-Bit Word
Rev. H | Page 30 of 100
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