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| 型号： | EVAL-ADM2582EEB1Z |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/20页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADM2582E |
| 标准包装： | 1 |
| 系列： | * |
ADM2582E/ADM2587E
Rev. C | Page 14 of 20
CIRCUIT DESCRIPTION
SIGNAL ISOLATION
The ADM2582E/ADM2587E signal isolation is implemented on
the logic side of the interface. The part achieves signal isolation
by having a digital isolation section and a transceiver section
(see Figure 1). Data applied to the TxD and DE pins and
referenced to logic ground (GND1) are coupled across an
isolation barrier to appear at the transceiver section referenced
to isolated ground (GND2). Similarly, the single-ended receiver
output signal, referenced to isolated ground in the transceiver
section, is coupled across the isolation barrier to appear at the
RXD pin referenced to logic ground.
POWER ISOLATION
The ADM2582E/ADM2587E power isolation is implemented
using an isoPower integrated isolated dc-to-dc converter. The
dc-to-dc converter section of the ADM2582E/ADM2587E works
on principles that are common to most modern power supplies.
It is a secondary side controller architecture with isolated pulse-
width modulation (PWM) feedback. VCC power is supplied to
an oscillating circuit that switches current into a chip-scale air
core transformer. Power transferred to the secondary side is
rectified and regulated to 3.3 V. The secondary (VISO) side
controller regulates the output by creating a PWM control
signal that is sent to the primary (VCC) side by a dedicated
i
Coupler data channel. The PWM modulates the oscillator
circuit to control the power being sent to the secondary side.
Feedback allows for significantly higher power and efficiency.
TRUTH TABLES
The truth tables in this section use the abbreviations found in
Table 11. Truth Table Abbreviations
Letter
Description
H
High level
L
Low level
X
Don’t care
Z
High impedance (off )
NC
Disconnected
Table 12. Transmitting (see Table 11 for Abbreviations)
Inputs
Outputs
DE
TxD
Y
Z
H
L
H
L
H
L
X
Z
X
Z
Table 13. Receiving (see Table 11 for Abbreviations)
Inputs
Output
A B
RE
RxD
≥ 0.03 V
L or NC
H
≤ 0.2 V
L or NC
L
0.2 V < A B < 0.03 V
L or NC
X
Inputs open
L or NC
H
X
H
Z
THERMAL SHUTDOWN
The ADM2582E/ADM2587E contain thermal shutdown circuitry
that protects the parts from excessive power dissipation during
fault conditions. Shorting the driver outputs to a low impedance
source can result in high driver currents. The thermal sensing
circuitry detects the increase in die temperature under this
condition and disables the driver outputs. This circuitry is
designed to disable the driver outputs when a die temperature
of 150°C is reached. As the device cools, the drivers are reenabled
at a temperature of 140°C.
OPEN- AND SHORT-CIRCUIT, FAIL-SAFE RECEIVER
INPUTS
The receiver inputs have open- and short-circuit, fail-safe
features that ensure that the receiver output is high when the
inputs are open or shorted. During line-idle conditions, when no
driver on the bus is enabled, the voltage across a terminating
resistance at the receiver input decays to 0 V. With traditional
transceivers, receiver input thresholds specified between 200 mV
and +200 mV mean that external bias resistors are required on the
A and B pins to ensure that the receiver outputs are in a known
state. The short-circuit, fail-safe receiver input feature eliminates
the need for bias resistors by specifying the receiver input threshold
between 30 mV and 200 mV. The guaranteed negative threshold
means that when the voltage between A and B decays to 0 V, the
receiver output is guaranteed to be high.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
The digital signals transmit across the isolation barrier using
i
Coupler technology. This technique uses chip-scale transformer
windings to couple the digital signals magnetically from one
side of the barrier to the other. Digital inputs are encoded into
waveforms that are capable of exciting the primary transformer
winding. At the secondary winding, the induced waveforms are
decoded into the binary value that was originally transmitted.
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by the
pulses, indicating input logic transitions. In the absence of logic
transitions at the input for more than 1 μs, periodic sets of refresh
pulses indicative of the correct input state are sent to ensure dc
correctness at the output. If the decoder receives no internal pulses
of more than approximately 5 μs, the input side is assumed to be
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