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| 型号： | EVAL-ADUC841QSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 49/88页 |
| 文件大小： | 0K |
| 描述： | KIT DEV FOR ADUC841 QUICK START |
| 产品培训模块： | Process Control |
| 标准包装： | 1 |
| 系列： | QuickStart™ 套件 |
| 类型： | MCU |
| 适用于相关产品： | ADuC841 |
| 所含物品： | 评估板、电源、缆线、软件和说明文档 |
| 产品目录页面： | 739 (CN2011-ZH PDF) |
| 相关产品： | ADUC841BCPZ62-3-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP ADUC841BCPZ62-5-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP ADUC841BCPZ8-3-ND - IC MCU 8KB FLASH ADC/DAC 56LFCSP ADUC841BCPZ8-5-ND - IC MCU 8KB FLASH ADC/DAC 56LFCSP ADUC841BSZ62-5-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP ADUC841BSZ62-3-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP |
| 其它名称： | EVAL-ADUC841QS EVAL-ADUC841QS-ND |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 53 of 88
WATCHDOG TIMER
The purpose of the watchdog timer is to generate a device reset
or interrupt within a reasonable amount of time if the ADuC841/
ADuC842/ADuC843 enter an erroneous state, possibly due to a
programming error or electrical noise. The watchdog function
can be disabled by clearing the WDE (watchdog enable) bit in
the watchdog control (WDCON) SFR. When enabled, the
watchdog circuit generates a system reset or interrupt (WDS) if
the user program fails to set the watchdog (WDE) bit within a
predetermined amount of time (see PRE3-0 bits in Table 23.
The watchdog timer is clocked directly from the 32 kHz
external crystal on the ADuC842/ADuC843. On the ADuC841,
the watchdog timer is clocked by an internal R/C oscillator at
32 kHz ±10%. The WDCON SFR can be written only by user
software if the double write sequence described in WDWR
below is initiated on every write access to the WDCON SFR.
WDCON Watchdog Timer
Control Register
SFR Address
C0H
Power-On Default
10H
Bit Addressable
Yes
Table 23. WDCON SFR Bit Designations
Bit No.
Name
Description
7
PRE3
Watchdog Timer Prescale Bits.
6
PRE2
The watchdog timeout period is given by the equation
tWD = (2PRE × (29/ fXTAL))
5
PRE1
(0 – PRE – 7; fXTAL = 32.768 kHz (ADuC842/ADuC843), or 32kHz ± 10%(ADuC841) )
PRE3
PRE2
PRE1
PRE0
Timeout Period (ms)
Action
0
15.6
Reset or Interrupt
0
1
31.2
Reset or Interrupt
0
1
0
62.5
Reset or Interrupt
0
1
125
Reset or Interrupt
0
1
0
250
Reset or Interrupt
0
1
0
1
500
Reset or Interrupt
0
1
0
1000
Reset or Interrupt
0
1
2000
Reset or Interrupt
1
0
0.0
Immediate Reset
4
PRE0
PRE3–0 > 1000
Reserved
3
WDIR
Watchdog Interrupt Response Enable Bit.
If this bit is set by the user, the watchdog generates an interrupt response instead of a system reset when the
watchdog timeout period has expired. This interrupt is not disabled by the CLR EA instruction, and it is also a fixed,
high priority interrupt. If the watchdog is not being used to monitor the system, it can be used alternatively as a
timer. The prescaler is used to set the timeout period in which an interrupt will be generated.
2
WDS
Watchdog Status Bit.
Set by the watchdog controller to indicate that a watchdog timeout has occurred.
Cleared by writing a 0 or by an external hardware reset. It is not cleared by a watchdog reset.
1
WDE
Watchdog Enable Bit.
Set by the user to enable the watchdog and clear its counters. If this bit is not set by the user within the watchdog
timeout period, the watchdog generates a reset or interrupt, depending on WDIR.
Cleared under the following conditions: user writes 0, watchdog reset (WDIR = 0); hardware reset; PSM interrupt.
Watchdog Write Enable Bit.
To write data to the WDCON SFR involves a double instruction sequence. The WDWR bit must be set and the very
next instruction must be a write instruction to the WDCON SFR.
For example:
CLR
EA
;disable interrupts while writing
;to WDT
SETB
WDWR
;allow write to WDCON
MOV
WDCON,#72H
;enable WDT for 2.0s timeout
0
WDWR
SETB
EA
;enable interrupts again (if rqd)
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| EVAL-ADUC842QS | 功能描述:KIT DEV FOR ADUC842 QUICK START RoHS:否 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ 套件 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| EVAL-ADUC842QS1 | 制造商:AD 制造商全称:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| EVAL-ADUC842QSP1 | 制造商:AD 制造商全称:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| EVAL-ADUC842QSP2 | 制造商:AD 制造商全称:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| EVAL-ADUC842QSPZ | 功能描述:KIT DEV QUICK START ADUC842 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 标准包装:1 系列:PICDEM™ 类型:MCU 适用于相关产品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，线缆，元件，CD，PICkit 编程器 产品目录页面:659 (CN2011-ZH PDF) |
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