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参数资料
| 型号： | EVB90255 |
| 英文描述： | EVB90255 EValuation Board for the MLX90255 |
| 中文描述： | EVB90255评估板MLX90255 |
| 文件页数： | 1/5页 |
| 文件大小： | 125K |
| 代理商： | EVB90255 |
MLX90255
Linear Optical Array
MLX90255 Linear Optical Array
Page 1 of 5
Rev 1.0 31-May-01
Application Note: MLX90255 Demo Board
The demo board described in this document facilitates the evaluation of the MLX90255xx Linear Optical
Arrays. The board provides the necessary timing and clock signals to support both the on-board imaging
device or an externally connected sensor. The designer is then free to investigate the properties and
performance of the device without having to design and construct an external support circuitry. A
regulated DC power supply between 6 and 10V is the only input signal. An oscilloscope is required for
observation and analysis of the output signals.
Features and Benefits
128 x 1 Sensor-Element Organization (1 Not Connected, 1 dummy, 128 real, 1 dummy, 1
Dark Pixel)
385 DPI sensor pitch
High Linearity and Uniformity for 256 Gray-Scale
High Sensitivity: 1.7V @ 10W/cm 2 @ 0.7ms integration time
Special Gain Compensation for use with single LED light source
Output Referenced to Ground
Single 5V Supply
Operation to 1MHz
Applications
position Sensing
electrical Power Assist Steering (EPAS)
spectrometer Applications
Functional Diagram
General Description
The MLX90255xx linear sensor array consists of
a 128 x 1 array of photodiodes, associated
charge amplifier circuitry and a pixel data-hold
function that provides simultaneous integration
start and stop times for all pixels. The pixels
measure 200m (H) by 66 m (W) and there is 8
m
spacing
between
pixels.
Operation
is
simplified by internal control logic that requires
only a Serial Input (SI) pulse and a clock signal.
The
sensor
consists
of
128
photodiodes
arranged in a linear array. Light energy falling on
a photodiode generates photocurrent, which is
integrated by the active integration circuitry
associated with that pixel. During the integration
period, a sampling capacitor connects to the
output of the integrator through an analog
switch. The amount of charge accumulated at
each pixel is directly proportional to the light
intensity and the integration time. The output
and reset of the integrators is controlled by a
132-bit shift register and reset logic. An output
cycle is initiated by clocking in a logic 1 on SI.
This causes all 132 sampling capacitors to be
disconnected from their respective integrators
and starts an integrator-reset period.
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