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参数资料
| 型号： | FAB3103UCX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 11/13页 |
| 文件大小： | 0K |
| 描述： | IC AMP AUD 2.3W CLASS D 12-WLCSP |
| 标准包装： | 1 |
| 类型： | D 类 |
| 输出类型： | 1-通道（单声道） |
| 在某负载时最大输出功率 x 通道数量： | 2.3W x 1 @ 8 欧姆 |
| 电源电压： | 2.5 V ~ 5.2 V |
| 特点： | AGC，无噪音，差分输入，短路保护和热保护，关断 |
| 安装类型： | 表面贴装 |
| 供应商设备封装： | 12-WLCSP |
| 封装/外壳： | 12-UFBGA，WLCSP |
| 包装： | 标准包装 |
| 其它名称： | FAB3103UCXFSDKR |
74LVC16240A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 3 November 2011
7 of 16
NXP Semiconductors
74LVC16240A
16-bit buffer/line driver; 5V tolerant; inverting; 3-state
[1]
All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25 C.
10. Dynamic characteristics
IOZ
OFF-state
output
current
VI =VIH or VIL; VCC = 3.6 V;
VO =5.5 V orGND;
-0.1
5-
20
A
IOFF
power-off
leakage
current
VCC = 0 V; VI or VO = 5.5 V
-
0.1
10
-
20
A
ICC
supply
current
VCC = 3.6 V; VI =VCC or GND;
IO =0A
-0.1
20
-80
A
I
CC
additional
supply
current
per input pin;
VCC = 2.7 V to 3.6 V;
VI =VCC 0.6 V; IO =0A
-
5
500
-
5000
A
CI
input
capacitance
VCC = 0 V to 3.6 V;
VI =GND to VCC
-
5.0
--
-pF
Table 6.
Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation
delay
nAntonYn; see Figure 4
VCC = 1.2 V
-
12.0
-
ns
VCC = 1.65 V to 1.95 V
1.0
5.1
11.0
1.0
11.7
ns
VCC = 2.3 V to 2.7 V
0.5
2.7
5.5
0.5
6.1
ns
VCC = 2.7 V
1.0
2.7
5.2
1.0
6.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.3
4.2
1.0
5.5
ns
ten
enable time
nOE to nYn; see Figure 5
VCC = 1.2 V
-
18.0
-
ns
VCC = 1.65 V to 1.95 V
1.5
6.6
12.8
1.5
13.5
ns
VCC = 2.3 V to 2.7 V
1.0
3.8
6.8
1.0
7.5
ns
VCC = 2.7 V
1.5
3.5
5.8
1.5
7.5
ns
VCC = 3.0 V to 3.6 V
1.0
3.0
5.0
1.0
6.5
ns
tdis
disable time
nOE to nYn; see Figure 5
VCC = 1.2 V
-
11.0
-
ns
VCC = 1.65 V to 1.95 V
2.9
4.7
9.2
2.9
9.7
ns
VCC = 2.3 V to 2.7 V
1.0
2.6
5.0
1.0
5.6
ns
VCC = 2.7 V
1.5
3.5
5.1
1.5
6.5
ns
VCC = 3.0 V to 3.6 V
1.5
3.2
4.9
1.5
6.5
ns
tsk(o)
output skew
time
VCC = 3.0 V to 3.6 V
-
1.0
-
1.5
ns
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