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| 型号： | FAN2108MPX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 10/14页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 8A 25MLP |
| 标准包装： | 1 |
| 系列： | TinyBuck™ |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 19 V |
| 输入电压： | 3 V ~ 24 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 200kHz ~ 600kHz |
| 电流 - 输出： | 8A |
| 同步整流器： | 是 |
| 工作温度： | -10°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 25-MLP |
| 包装： | 标准包装 |
| 供应商设备封装： | 25-MLP（5x6） |
| 产品目录页面： | 1214 (CN2011-ZH PDF) |
| 其它名称： | FAN2108MPXDKR |
Circuit Description
Initialization
Once V CC exceeds the UVLO threshold and EN is HIGH,
the IC checks for an open or shorted FB pin before
releasing the internal soft-start ramp (SS).
If R1 is open (Figure 1) , the error amplifier output
(COMP) is forced LOW and no pulses are generated.
After the SS ramp times out (T1.0), an under-voltage
latched fault occurs.
Soft-Start
Once internal SS ramp has charged to 0.8 V (T0.8), the
output voltage is in regulation. Until SS ramp reaches
1.0 V (T1.0), the fault latch is inhibited.
To avoid skipping the soft-start cycle, it is necessary to
apply V IN before V CC reaches its UVLO threshold.
Soft-start time is a function of oscillator frequency.
If the parallel combination of R1 and R BIAS is ≤ 1 K Ω , the
internal SS ramp is not released and the regulator does
not start.
EN
1.35V
Bias Supply
2400 CLKs
0.8V
The FAN2108 requires a 5 V supply rail to bias the IC
and provide gate-drive energy. Connect a ≥ 1.0 μf X5R
or X7R decoupling capacitor between VCC and PGND.
Since V CC is used to drive the internal MOSFET gates,
supply current is frequency and voltage dependent.
Approximate V CC current (I CC ) is calculated by:
FB
SS
1.0V
0.8V
Fault
Latch
Enable
I CC ( mA ) = 4 . 58 + [(
V CC ? 5
+ 0 . 013 ) ? ( f ? 128 )]
227
where frequency (f) is expressed in KHz.
(1)
3200 CLKs
T0.8
4000 CLKs
Enable
FAN2108 has an internal pull-up to enable pin so that
the IC is enabled once V CC is applied. Connecting a
small capacitor across EN and AGND delays the rate of
voltage rise on the EN pin. EN pin also serves for the
restart whenever a fault occurs (refer to the Auto-Restart
section) . For applications where sequencing is required,
FAN2108 can be enabled (after the V CC comes up) with
external control, as shown in Figure 20.
Figure 20. Enabling with External Control
Setting the Frequency
T1.0
Figure 21. Soft-Start Timing Diagram
The regulator does not allow the low-side MOSFET to
operate in full synchronous rectification mode until
internal SS ramp reaches 95% of V REF (~0.76 V). This
helps the regulator to start on a pre-biased output and
ensures that inductor current does not "ratchet" up
during the soft-start cycle.
V CC UVLO or toggling the EN pin discharges the SS and
resets the IC.
Setting the Output Voltage
The output voltage of the regulator can be set from
0.8 V to 80% of V IN by an external resistor divider (R1
and R BIAS in Figure 1).
The internal reference is 0.8 V with 650 nA, sourced
from the FB pin to ensure that, if the pin is open, the
regulator does not start.
The external resistor divider is calculated using:
( 10 6 / f ) ? 135
R T ( K Ω ) =
= OUT
+ 650 nA
Oscillator frequency is determined by an external resistor,
R T , connected between the R(T) pin and AGND.
Resistance is calculated by:
(2)
65
where R T is in K Ω and frequency (f) is in KHz.
The regulator cannot start if R T is left open.
0 . 8 V V ? 0 . 8 V
R BIAS R 1
Connect R BIAS between FB and AGND.
(3)
? 2008 Fairchild Semiconductor Corporation
FAN2108 ? Rev. 1.0.2
10
www.fairchildsemi.com
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