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| 型号： | FAN3111ESX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 12/18页 |
| 文件大小： | 0K |
| 描述： | IC GATE DVR SGL 1A EXTER SOT23-5 |
| 特色产品： | FAN3111/FAN3121/FAN3122 Single 1A & 9A High Speed, Low-Side Gate Drivers |
| 标准包装： | 1 |
| 配置： | 低端 |
| 输入类型： | 非反相 |
| 延迟时间： | 15ns |
| 电流 - 峰： | 1.4A |
| 配置数： | 1 |
| 输出数： | 1 |
| 电源电压： | 4.5 V ~ 18 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 供应商设备封装： | SOT-23-5 |
| 包装： | 标准包装 |
| 产品目录页面： | 1214 (CN2011-ZH PDF) |
| 其它名称： | FAN3111ESXDKR |
Applications Information
The FAN3111 offers CMOS- or logic-level-compatible
input thresholds. In the FAN3111C, the logic input
thresholds are dependent on the V DD level and, with V DD
of 12V, the logic rising-edge threshold is approximately
55% of V DD and the input falling-edge threshold is
approximately 38% of V DD . The CMOS input
configuration offers a hysteresis voltage of
approximately 17% of V DD . The CMOS inputs can be
used with relatively slow edges (approaching DC) if
good decoupling and bypass techniques are
Figure 36 illustrates startup operation as V DD increases
from 0 to 12V with the output commanded to the high
level (IN+ tied to VDD, IN- tied to GND). This
configuration might not be suitable for driving high-side
P-channel MOSFETs because the low output voltage of
the driver would attempt to turn the P-channel MOSFET
on with low V DD levels.
VDD
incorporated in the system design to prevent noise from
violating the input-voltage hysteresis window. This
allows setting precise timing intervals by fitting an R-C
circuit between the controlling signal and the IN pin of
the driver. The slow rising edge at the IN pin of the
OUT
FAN3111C
OUT @ 5 V/Div
driver introduces a delay between the controlling signal
and the OUT pin of the driver.
In the FAN3111E, the input thresholds are dependent
on the V XREF voltage that typically is chosen between 2V
and 5V. This range of V XREF allows compatibility with
TTL and other logic levels up to 5V by connecting the
XREF pin to the same source as the logic circuit that
drives the FAN3111E input stage. The logic rising edge
threshold is approximately 50% of V XREF and the input
falling-edge threshold is approximately 30% of V XREF .
The TTL-like input configuration offers a hysteresis
VDD @ 5 V/Div
t = 200 us/Div
Figure 36. Startup Operation as V DD Increases
Figure 37 illustrates FAN3111E startup operation with the
output commanded to the low level (IN+ tied to ground)
and the voltage on XREF ramped from 0 to 3.3V.
voltage of approximately 20% of V XREF .
Startup Operation
The FAN3111 internal logic is optimized to drive ground
referenced N-channel MOSFETs as V DD supply voltage
rises during startup operation. As V DD rises from 0V to
approximately 2V, the OUT pin is held LOW by an
internal resistor, regardless of the state of the input pins.
XREF
VDD
OUT
FAN3111E
VDD @ 5 V/Div
OUT @ 2 V/Div
When the internal circuitry becomes active at
approximately 2V, the output assumes the state
commanded by the inputs.
Figure 35 illustrates FAN3111C startup operation with
V DD increasing from 0 to 12V, with the output
commanded to the low level (IN+ and IN- tied to
ground). Note that OUT is held LOW to maintain an N-
channel MOSFET in the OFF state.
VDD
OUT
FAN3111C
OUT @ 5 V/Div
VDD @ 5 V/Div
t = 200 us/Div
VXREF @ 2 V/Div
t = 50 us/Div
Figure 37. FAN3111E Startup Operation
MillerDrive? Gate Drive Technology
FAN3111 drivers incorporate the MillerDrive architecture
shown in Figure 38 for the output stage, a combination
of bipolar and MOS devices capable of providing large
currents over a wide range of supply-voltage and
temperature variations. The bipolar devices carry the
bulk of the current as OUT swings between 1/3 to 2/3
V DD and the MOS devices pull the output to the high or
low rail.
The purpose of the MillerDrive architecture is to speed
up switching by providing the highest current during the
Miller plateau region when the gate-drain capacitance of
the MOSFET is being charged or discharged as part of
the turn-on / turn-off process. For applications with zero
voltage switching during the MOSFET turn-on or turn-off
Figure 35.
FAN3111C Startup Operation
interval, the driver supplies high peak current for fast
switching even though the Miller plateau is not present.
This situation often occurs in synchronous rectifier
applications because the body diode is generally
conducting before the MOSFET is switched on.
? 2008 Fairchild Semiconductor Corporation
FAN3111 ? Rev. 1.0.3
12
www.fairchildsemi.com
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PDF描述 |
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| FAN3213TMX | IC GATE DRIVER DUAL 4A 8-SOIC |
| FAN3217TMX | IC GATE DRIVER DUAL 2A 8-SOIC |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| FAN3121 | 制造商:Fairchild 功能描述:GATE DRIVER SINGLE INV + ENABLE SINGLE9A |
| FAN3121_12 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:Single 9A High-Speed, Low-Side Gate Driver |
| FAN3121_13 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:Single 9-A High-Speed, Low-Side Gate Driver |
| FAN3121C | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:30V PMOS-NMOS Bridge Driver |
| FAN3121CMPX | 功能描述:功率驱动器IC Single 9A Low Side Gate RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
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