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参数资料
| 型号： | FAN3229TMPX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 9/26页 |
| 文件大小： | 0K |
| 描述： | IC GATE DVR LOW DUAL 2A HS 8MLP |
| 标准包装： | 1 |
| 配置： | 低端 |
| 输入类型： | 反相和非反相 |
| 延迟时间： | 19ns |
| 电流 - 峰： | 3A |
| 配置数： | 2 |
| 输出数： | 2 |
| 电源电压： | 4.5 V ~ 18 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-MLP |
| 供应商设备封装： | 8-MLP（3x3） |
| 包装： | 标准包装 |
| 产品目录页面： | 1215 (CN2011-ZH PDF) |
| 其它名称： | FAN3229TMPXDKR |
Electrical Characteristics (Continued)
Unless otherwise noted, V DD =12 V, T J =-40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
ENABLE (FAN3226C, FAN3226T, FAN3227C, FAN3227T) (continued)
t D3
t D4
EN to Output Propagation Delay (12)
0 V to 5 V EN, 1 V/ns Slew Rate
5 V to 0 V EN, 1 V/ns Slew Rate
10
10
19
18
34
32
ns
ns
FAN3226CMX, FAN3226TMX, FAN3227CMX, FAN3227TMX_F085 (Automotive-Qualified Versions)
t D3
t D4
EN to Output Propagation Delay (12),(14)
0 V to 5 V EN, 1 V/ns Slew Rate
5 V to 0 V EN, 1 V/ns Slew Rate
8
8
19
18
35
35
ns
ns
Outputs
OUT Current, Peak, Sourcing
I SINK
I SOURCE
I PK_SINK
I PK_SOURCE
OUT Current, Mid-Voltage, Sinking (11)
OUT Current, Mid-Voltage,
Sourcing (11)
OUT Current, Peak, Sinking (11)
(11)
OUT at V DD /2,
C LOAD =0.1 μF, f=1 kHz
OUT at V DD /2,
C LOAD =0.1 μF, f=1 kHz
C LOAD =0.1 μF, f=1 kHz
C LOAD =0.1 μF, f=1 kHz
2.4
-1.6
3
-3
A
A
A
A
Output Rise Time
Output Fall Time
Output Reverse Current Withstand
t RISE
t FALL
I RVS
(13)
(13)
(11)
C LOAD =1000 pF
C LOAD =1000 pF
12
9
500
22
17
ns
ns
mA
FAN322xT, FAN322xC
Channels
t D1
t D2
t D1
t D2
t DEL.MATCH
Output Propagation Delay, CMOS
Inputs (13)
Output Propagation Delay, TTL
Inputs (13)
Propagation Matching Between
(14)
CMOS Input
CMOS Input
TTL Input
TTL Input
INA=INB, OUTA and OUTB at
50% Point
7
6
10
10
15
15
19
18
1
30
29
34
32
2
ns
ns
ns
FAN322xTMX_F085, FAN322xCMX_F085 (Automotive-Qualified Versions)
t D1
t D2
t D1
t D2
t DEL.MATCH
V OH
V OL
Output Propagation Delay, CMOS
Inputs (13),(14)
Output Propagation Delay, TTL
Inputs (13),(14)
Propagation Matching Between
Channels (14)
High Level Output Voltage (14)
Low Level Output Voltage (14)
CMOS Input
CMOS Input
TTL Input
TTL Input
INA=INB, OUTA and OUTB at
50% Point
V OH =V DD – V OUT , I OUT = – 1 mA
I OUT = 1 mA
7
6
9
9
15
15
19
18
2
15
10
33
42
34
32
4
35
25
ns
ns
ns
mV
mV
Notes:
9. Lower supply current due to inactive TTL circuitry.
10. EN inputs have TTL thresholds; refer to the ENABLE section.
11. Not tested in production.
12. See Timing Diagrams of Figure 11 and Figure 12.
13. See Timing Diagrams of Figure 9 and Figure 10.
14. Apply to only F085 Version
? 2007 Fairchild Semiconductor Corporation
FAN3226 / FAN3227 / FAN3228 / FAN3229 ? Rev. 1.1.0
9
www.fairchildsemi.com
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