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参数资料
| 型号： | FAN5201MSA |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 6 A BATTERY CHARGE CONTROLLER, 275 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封装： | SSOP-24 |
| 文件页数： | 16/19页 |
| 文件大小： | 142K |
| 代理商： | FAN5201MSA |
FAN5201
6
Pr
eliminar
y
Speci
cation
Notes:
1. 5V DRV Current = 0, SMBus off.
2. A device will timeout when any clock low exceeds this value.
3. THIGH Max provides a simple guaranteed method for devices to detect bus idle conditions.
4. TLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start to
the stop. If a slave device exceeds this time, it is expected to release both its clock and data times and reset itself.
INISO High Output, VDCIN – VHI
100
mV
INISO Low Output, VDCIN –VLO
VDCIN = 19V
10
12
V
VDCIN = 10V
8
V
SMBus
Data/Clock input low voltage, VIL
-0.3
0.6
V
Data/Clock input high voltage, VIH
1.4
5.5
V
Data/Clock output low voltage, VOL
At IPULLUP MIN
0.4
V
Data/Clock hysteresis, VHYS
200
mV
Input leakage, ILEAK
-1
1
A
Current through pullup resistor or
current source, IPULLUP
100
350
A
SMB operating frequency, FSMB
10
100
kHz
Bus free time between Stop and Start
condition, TBUF
4.7
sec
Hold time after (repeated) Start
condition, THD:STA
After this period, the first clock is
generated
4.0
sec
Repeated Start condition setup time,
TSU:STA
4.7
sec
Stop condition setup time, TSU:STO
4.0
sec
Data hold time, THD:DAT
300
nsec
Data setup time, TSU:DAT
250
nsec
TTIMEOUT
Note 2
25
35
msec
Clock low period, TLOW
4.7
sec
Clock high period, THIGH
Note 3
4.0
50
sec
Cumulative clock low extend time,
TLOW:SEXT
Note 4
25
msec
Clock/Data fall time, TF
300
nsec
Clock/Data rise time, TR
1000
nsec
Operating Conditions (Continued) DCIN = 19V, T
A = 0-70°C, unless otherwise specied.
Parameter
Conditions
Min.
Typ.
Max.
Unit
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