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参数资料
| 型号： | FAN5201MSA |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 6 A BATTERY CHARGE CONTROLLER, 275 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封装： | SSOP-24 |
| 文件页数： | 18/19页 |
| 文件大小： | 142K |
| 代理商： | FAN5201MSA |
FAN5201
8
Pr
eliminar
y
Speci
cation
Voltage Control Loop
The internal transconductance voltage amplier controls the
FAN5201’s output voltage. The battery voltage is fed to the
non-inverting input of the amplier from the VFB pin. The
voltage at the amplier’s inverting input is set by an 8-bit DAC,
which is controlled by a ChargingVoltage( ) command on the
SMBus (See the FAN5201 Logic section and SMBus Inter-
face Specication for more information). The output of the
amplier drives an inverting “or’ring” transistor; the or’ring
provides control of the PWM to the lowest of the three ampli-
ers, while the inversion provides the negative feedback
needed for proper control. The ChargingVoltage( ) command
of the SMBus provides a 10.000V offset, and 32mV steps, so
that the charging voltage can be anywhere from 10.000V to
10.000V + 255 * 32mV = 18.16V. Because a lithium-ion
(Li+) battery’s typical per-cell voltage is 4.2V maximum, this
charger is best suited for 3- and 4-cell batteries. It can also be
used for several different cell counts with NiMH batteries.
The voltage amplier’s output is connected to the CompV pin,
which compensates the voltage-regulation loop. Typically, a
series-resistor/capacitor combination is used to form a pole-
zero pair. The pole introduced rolls off the gain starting at low
frequencies. The zero provides AC gain at mid-frequencies.
The output capacitor of the switcher then rolls off the mid-
frequency gain to below 1 to guarantee stability, before
encountering the zero introduced by the output capacitor’s
ESR. Further information on loop stabilization is available
in Applications Bulletin AB-18.
Current Control Loop
The internal transconductance current amplier controls the
battery current while the charger is regulating current. Battery
current is sensed by monitoring the voltage across a sense
resistor (pins IFB and BAT) with an amplier that removes
the common mode battery voltage. The battery current is fed
to the non-inverting input of the amplier. The voltage at the
amplier’s inverting input is set by an 8-bit DAC, which is
controlled by a ChargingCurrent( ) command on the SMBus
(See the FAN5201 Logic section and SMBus Interface Spec-
ication for more information). The output of the amplier
drives an inverting “or’ring” transistor; the or’ring provides
control of the PWM to the lowest of the three ampliers,
while the inversion provides the negative feedback needed
for proper control. The ChargingCurrent( ) command of the
SMBus provides 32mA steps with an 18m
sense resistor,
so that the charging current can be anywhere from 0.000A to
255 * 32mA = 8.16A.
The current amplier’s output is connected to the CompI pin,
which compensates the current-regulation loop. Typically, a
series-resistor/capacitor combination is used to form a pole-
zero pair. The pole introduced rolls off the gain starting at low
frequencies. The zero provides AC gain at mid-frequencies.
The output capacitor of the switcher then rolls off the mid-
frequency gain to below 1 to guarantee stability, before
encountering the zero introduced by the output capacitor’s
ESR. Further information on loop stabilization is available
in Applications Bulletin AB-18.
Power Control Loop
The internal transconductance power amplier controls the
system’s total power consumption (notebook plus battery
charging). Input voltage is monitored on pin DCIN, and
input current is sensed by monitoring the voltage across a
sense resistor (pins PSIN+ and PSIN-) with an amplier that
removes the common mode input voltage. These two signals
are then multiplied together with an analog multiplier, and
the result is fed to the non-inverting input of the amplier.
The voltage at the amplier’s inverting input is set by a 4-bit
DAC, which is controlled by a ChargingPower( ) command
on the SMBus (See the FAN5201 Logic section and SMBus
Interface Specication for more information). The output of
the amplier drives an inverting “or’ring” transistor; the
or’ring provides control of the PWM to the lowest of the
three ampliers, while the inversion provides the negative
feedback needed for proper control. The ChargingPower( )
command of the SMBus provides a 25W offset, and 5W
steps, so that the total power drawn can be anywhere from
25W to 25W + 15 * 5W = 100W.
The power amplier’s output is connected to the CompP pin,
which compensates the power-regulation loop. Typically, a
series-resistor/capacitor combination is used to form a pole-
zero pair. The pole introduced rolls off the gain starting at low
frequencies. The zero provides AC gain at mid-frequencies.
The output capacitor of the switcher then rolls off the mid-
frequency gain to below 1 to guarantee stability, before
encountering the zero introduced by the output capacitor’s
ESR. Further information on loop stabilization is available
in Applications Bulletin AB-18.
A sudden surge in power required by the notebook will result
in a momentary overload on the AC adapter. This has no ill
effects, because the power loop recovery time is much shorter
than the adapter's thermal time constant, and the minimum
adapter output voltage equals the battery voltage, which is
sufcient to run the notebook.
PWM Controller
The battery voltage or current or input power is controlled by
the pulse-width-modulated (PWM) DC-DC converter control-
ler. This controller drives two external MOSFETs, an N- and
a P-channel, which switch the voltage from the input source.
This switched voltage feeds an inductor, which lters the
switched rectangular wave. The controller sets the pulse width
of the switched voltage so that it supplies the desired voltage
or current to the battery. The heart of the PWM controller is
its multi-input comparator. This comparator compares the
lowest of three input signals with a ramp, to determine the
pulse width of the switched signal, setting the battery voltage
or current. The three signals being or’red together are the
current-sense amplier’s output, the voltage-error amplier’s
output, and the power-error amplier’s output.
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