参数资料
型号: FAN5341UMPX
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: 显示驱动器
中文描述: LED DISPLAY DRIVER, PDSO6
封装: 2 X 2 MM, 0.55 MM HEIGHT, GREEN, MO-229, UMLP-6
文件页数: 7/11页
文件大小: 673K
代理商: FAN5341UMPX
2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN5341 Rev. 1.0.1
5
FA
N
5
341
Seri
es
B
oost
LED
D
river
wit
h
Int
e
grat
ed
Schottky
Diode
and
Singl
e-
W
ire
Digit
a
lInt
e
rf
ace
Electrical Specifications
VIN = 2.7V to 5.5V and TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = 25°C and VIN = 3.6V.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Power Supplies
ISD
Shutdown Supply Current
EN = GND, VIN = 3.6V
0.30
0.75
μA
VUVLO
Under-Voltage Lockout
Threshold
VIN Rising
2.10
2.35
2.60
V
VIN Falling
1.90
2.15
2.40
VUVHYST
Under-Voltage Lockout
Hysteresis
250
mV
EN: Enable Pin
VIH
HIGH-Level Input Voltage
1.2
V
VIL
LOW-Level Input Voltage
0.4
V
REN
EN Pull-Down Resistance
200
300
400
k
Ω
TLO
EN Low Time for Dimming
VIN = 3.6V; See Figure 14
0.5
300
s
THI
Time Delay Between Steps
VIN = 3.6V; See Figure 14
0.5
s
TSD
EN Low, Shutdown Pulse Width
VIN = 3.6V; from Falling Edge of EN
1
ms
Feedback and Reference
VFB
Feedback Voltage
ILED = 20mA from -40°C to +85°C,
2.7V ≤ VIN ≤ 5.5V
240
253
266
mV
IFB
Feedback Input Current
VFB = 253mV
0.1
1.0
μA
Power Outputs
RDS(ON)_Q1
Boost Switch On-Resistance
VIN = 3.6V, ISW = 100mA
600
m
Ω
VIN = 2.7V, ISW = 100mA
650
ISW(OFF)
SW Node Leakage
(1)
EN = 0, VIN = VSW = VOUT = 5.5V,
VLED = 0
0.1
2.0
μA
ILIM-PK
Boost Switch Peak Current Limit
VIN = 3.6V
750
mA
Oscillator
fSW
Boost Regulator Switching
Frequency
1.0
1.2
1.4
MHz
Output and Protection
VOVP
Boost Output Over-Voltage
Protection
18.0
18.9
21.0
V
OVP Hysteresis
0.8
VTLSC
VOUT Short Circuit Detection
Threshold
VOUT Falling
VIN – 1.4
V
VTHSC
VOUT Short Circuit Detection
Threshold
VOUT Rising
VIN – 1.2
V
DMAX
Maximum Boost Duty Cycle
(2,3)
85
%
DMIN
Minimum Boost Duty Cycle
(2,3)
20
TTSD
Thermal Shutdown
150
°C
THYS
Thermal Shutdown Hysteresis
35
°C
Notes:
1.
SW leakage current includes the leakage current of 2 internal switches; SW to GND and SW to VOUT.
2.
Not tested in production and guaranteed by design.
3.
Application should guarantee that minimum and maximum duty cycle should fall between 20-85% to meet the specified
range.
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