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参数资料
| 型号： | FAN53540UCX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 10/15页 |
| 文件大小： | 0K |
| 描述： | IC REG SYNC BUCK 5A 20WLCSP |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | FAN53540UCXDKR |
Operation Description
The FAN53540 is a step-down switching voltage regulator
that delivers an adjustable output from an input voltage
supply of 2.7 V to 5.5 V. Using a proprietary architecture with
synchronous rectification, the FAN53540 is capable of
delivering up to 5 A at over 90% efficiency. The regulator
limits the C OUT capacitance when a heavy load ( I LOAD(SS) ) is
applied during the startup.
The maximum C OUT capacitance for successful starting with
a heavy constant-current load is approximately:
operates at a nominal frequency of 2.4 MHz at full load,
which reduces the value of the external components to
470 nH for the output inductor and 20 μF for the output
C OUT
MAX
? ? 5 . 8 ? I LOAD ? ?
800
V OUT
(3)
capacitor. High efficiency is maintained at light load with
single-pulse PFM Mode.
Control Scheme
The FAN53540 uses a proprietary non-linear, fixed-
frequency PWM modulator to deliver very fast load transient
response, while maintaining a constant switching frequency
over a wide range of operating conditions.
Regulator performance is independent of the output
capacitor ESR, allowing for the use of ceramic output
capacitors. Although this type of operation normally results in
a switching frequency that varies with input voltage and load
current, an internal frequency loop holds the switching
frequency constant over a large range of input voltages and
load currents.
For very light loads, the FAN53540 operates in
Discontinuous Current (DCM) single-pulse PFM Mode, which
produces low output ripple compared with other PFM
architectures. Transition between PWM and PFM is
seamless, with a glitch of less than 3% of V OUT during the
transition between DCM and CCM Modes.
PFM Mode is disabled by holding the MODE pin HIGH. The
IC synchronizes to the MODE pin frequency. When
synchronizing to the MODE pin, PFM Mode is disabled.
Setting Output Voltage
The output voltage is set by the R1, R2, and V REF (0.8 V):
where C OUTMAX is expressed in ? F and I LOAD is
the load current during soft-start, expressed in A.
Diode Emulation Mode is employed during soft-start,
allowing the IC to start into a pre-charged output. Diode
emulation prohibits reverse inductor current from flowing
through the synchronous rectifier.
When EN is LOW, a 150 ? resistor discharges V OUT .
Under-Voltage Lockout (UVLO)
When EN is HIGH, the under-voltage lockout keeps the part
from operating until the input supply voltage rises high
enough to operate properly. This ensures no misbehavior of
the regulator during startup or shutdown.
Input Over-Voltage Protection (OVP)
When V IN exceeds V SDWN (about 6.1 V), the IC stops
switching to protect the circuitry from excessive internal
voltage spikes. An internal filter prevents the circuit from
shutting down due to V IN noise spikes.
Current Limiting
A heavy load or short circuit on the output causes the current
in the inductor to increase until a maximum current threshold
is reached in the high-side switch. Upon reaching this point,
the high-side switch turns off, preventing high currents from
causing damage. 16 consecutive PWM cycles in current limit
cause the regulator to shut down and stay off for about
R 1 V ? V REF
R 2 ?
? OUT
R 2 V REF
R1 must be set at or below 100 k ? ; therefore:
R 1 ? 0 . 8
? V OUT ? 0 . 8 ?
For example, for V OUT =1.2 V, R1=100 k ? , R2=200 k ? .
(1)
(2)
1.6 ms before attempting a restart.
In the event of a short circuit, the soft-start circuit attempts to
restart and produces an over-current fault after 16
consecutive cycles in current limit, which results in a duty
cycle of less than 5%, providing current into a short circuit.
External Frequency Synchronization
Logic 1 on the MODE pin forces the IC to stay in PWM
Mode. Logic 0 allows the IC to automatically switch to PFM
Enable and Soft-Start
When the EN pin is LOW, the IC is shut down, all internal
circuits are off, and the part draws very little current. Raising
EN above its threshold voltage activates the part and starts
the soft-start cycle. During soft-start, the modulator’s internal
reference is ramped slowly to minimize surge currents on the
input and prevents overshoot of the output voltage.
If large values of output capacitance are used, the regulator
may fail to start. If V OUT fails to achieve regulation within
1.2 ms from the beginning of soft-start, the regulator shuts
down and waits 1.6 ms before attempting a restart. If the
regulator is in current limit for 16 consecutive PWM cycles,
the regulator shuts down before restarting 1.6 ms later. This
? 2011 Fairchild Semiconductor Corporation
FAN53540 ? Rev. 1.0.3
10
during light loads. If the MODE pin is toggled, the converter
synchronizes its switching frequency to four times the
frequency on the mode pin (f MODE ).
The MODE pin is internally buffered with a Schmitt trigger,
which allows the MODE pin to be driven with slow rise and
fall times. An asymmetric duty cycle for frequency
synchronization is permitted, provided it is consistent with
parametric table limits.
www.fairchildsemi.com
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