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参数资料
| 型号： | FAN6555MX |
| 英文描述： | SMPS Controller |
| 中文描述： | 开关电源控制器 |
| 文件页数： | 1/12页 |
| 文件大小： | 91K |
| 代理商： | FAN6555MX |
www.fairchildsemi.com
REV. 1.1.2 1/9/02
Features
Can source and sink up to 2A continous, 3A peak
No heatsink required
Integrated Power MOSFETs
Generates termination voltages for DDR SDRAM
V
REF
input available for external voltage divider
Separate voltages for V
CCQ
Buffered V
REF
output
V
OUT
of ±3% or less at 2A
Minimum external components
16-pin SOIC package
-40°C to +85°C operating temperature range
Shutdown for standby or suspend mode operation
Thermal Shutdown
≈
130oC
and PV
DD
Description
The FAN6555 switching regulator is designed to convert
voltage supplies ranging from 2.3V to 4V into a desired out-
put voltage or termination voltage for DDR SDRAM mem-
ory. The FAN6555 can be implemented to produce regulated
output voltages in two different modes. In the default mode,
when the V
REF
pin is open, the FAN6555 output voltage is
50% of the voltage applied to V
be used to produce various user-defined voltages by forcing a
voltage on the VREF
IN
pin. In this case, the output voltage
follows the input VREF
IN
voltage. The switching regulator
is capable of sourcing or sinking up to 2A of current while
regulating an output V
TT
voltage to within 3% or less.
Transient output currents of ±3A can also be accommodated.
CCQ
. The FAN6555 can also
The FAN6555 can also be used in conjunction with series
termination resisitors to provide an excellent voltage source
for active termination schemes of high speed transmission
lines as those seen in high speed memory buses and distrib-
uted backplane designs.
Block Diagram
VL2
AGND
13
VREFIN
VREFOUT
11
6
VDD
1
SHDN
12
PVDD2
PVDD1
7
VL1
3
+
–
–
+
AV
CC
VCCQ
15
OSCILLATOR/
RAMP
GENERATOR
S
R
Q
Q
(VOUT)
(VOUT)
PGND1
DGND
VFB
PGND2
2
4
5
8
VDD
9
14
10
VREF BUFFER
ERROR AMP
RAMP
COMPARATOR
+
–
16
200k
200k
FAN6555
2A DDR Bus Termination Regulator
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