参数资料
| 型号： | FDMF6704A |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 11/14页 |
| 文件大小： | 0K |
| 描述： | MODULE DRMOS XS 40-MLP |
| 标准包装： | 1 |
| 系列： | XS™ DrMOS |
| 类型： | 高端/低端驱动器 |
| 输入类型： | 非反相 |
| 输出数： | 1 |
| 电流 - 输出 / 通道： | 35A |
| 电流 - 峰值输出： | 80A |
| 电源电压： | 3 V ~ 14 V |
| 工作温度： | -55°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-MLP |
| 供应商设备封装： | 40-MLP（6x6） |
| 包装： | 标准包装 |
| 其它名称： | FDMF6704ADKR |
Power Loss and Efficiency
Measurement and Calculation
Refer to Figure 24 for power loss testing method. Power loss
calculation are as follows:
(a) P IN = (V IN x I IN ) + (V 5V x I 5V ) (W)
(b) P SW = V SW x I OUT (W)
(c) P OUT = V OUT x I OUT (W)
(d) P LOSS_MODULE = P IN - P SW (W)
(e) P LOSS_BOARD = P IN - P OUT (W)
(f) EFF MODULE = 100 x P SW /P IN (%)
(g) EFF BOARD = 100 x P OUT /P IN (%)
PCB Layout Guideline
Figure 25 shows a proper layout example of FDMF6704A and
critical parts. All of high current flow path, such as VIN, VSWH,
V OUT and GND copper, should be short and wide for better and
stable current flow, heat radiation and system performance.
Following is a guideline which the PCB designer should
consider:
1. Input ceramic bypass capacitors must be close to VIN and
PGND pin of FDMF6704A to help reduce the input current ripple
component induced by switching operation.
2. The VSWH copper trace serves two purposes. In addition to
being the high frequency current path from the DrMOS package
to the output inductor, it also serves as heatsink for the lower
FET in the DrMOS package. The trace should be short and wide
enough to present a low impedance path for the high frequency,
high current flow between the DrMOS and inductor in order to
minimize losses and temperature rise. Please note that the
VSWH node is a high voltage and high frequency switching
node with high noise potential. Care should be taken to
minimize coupling to adjacent traces. Additionally, since this
copper trace also acts as heatsink for the lower FET, tradeoff
must be made to use the largest area possible to improve
DrMOS cooling while maintaining acceptable noise emission.
3. Output inductor location should be as close as possible to the
FDMF6704A for lower power loss due to copper trace. Care
should be taken so that inductor dissipation does not heat the
DrMOS.
4. The PowerTrench ? 5 MOSFETs used in the output stage are
very effective at minimizing ringing. In most cases, no snubber
will be required. If a snubber is used, it should be placed near
the FDMF6704A. The resistor and capacitor need to be of
proper size for the power dissipation.
5. Place ceramic bypass capacitor and BOOT capacitor as
close as possible to the VCIN and BOOT pins of the
FDMF6704A to ensure clean and stable power. Routing width
and length should be considered as well.
6. Include a trace from PHASE to VSWH in order to improve
noise margin. Keep the trace as short as possible.
7. The layout should include the option to insert a small value
series boot resistor between boot cap and BOOT pin. The boot
loop size, including Rboot and Cboot, should be as small as
possible. The boot resistor is normally not required, but is
effective at improving noise operating margin in multi phase
designs that may have noise issues due to ground bounce and
high negative VSWH ringing. The VIN and PGND pins handle
large current transients with frequency components above
100 MHz. If possible, these package pins should be connected
directly to the VIN and board GND planes. The use of thermal
relief traces in series with these pins is discouraged since this
will add inductance to the power path. This added inductance in
series with the PGND pin will degrade system noise immunity
by increasing negative VSWH ringing.
8. CGND pad and PGND pins should be connected by plane
GND copper with multiple vias for stable grounding. Poor
grounding can create a noise transient offset voltage level
between CGND and PGND. This could lead to fault operation of
gate driver and MOSFET.
9. Ringing at the BOOT pin is most effectively controlled by
close placement of the boot capacitor. Do not add an additional
BOOT to PGND capacitor. This may lead to excess current flow
through the BOOT diode.
10. SMOD#, DISB# and PWM pins don’t have internal pull up or
pull down resistors. They should not be left floating. These pins
should not have any noise filter caps.
11. Use multiple vias on each copper area to interconnect top,
inner and bottom layers to help smooth current flow and heat
conduction. Vias should be relatively large and of reasonable
inductance. Critical high frequency components such as Rboot,
Cboot, the RC snubber and bypass caps should be located
close to the DrMOS module and on the same side of the PCB
as the module. If not feasible, they should be connected from
the backside via a network of low inductance vias.
V 5V
A
I 5V
C VDRV
I IN
A
V IN
C VIN
VDRV VCIN
VIN
R BOOT
DISB#
PWM Input
SMOD#
DISB#
PWM
SMOD#
BOOT
PHASE
VSWH
C BOOT
L OUT
I OUT
A
V OUT
CGND
PGND
V
V SW
C OUT
Figure 24. Power Loss Measurement Block Diagram
FDMF6704A Rev. F
11
www.fairchildsemi.com
相关PDF资料 |
PDF描述 |
|---|---|
| FDMF6704 | IC DRMOS MODULE 1000KHZ 40-MLP |
| FDMF6705B | MOSFET DRMOS 40A 300KHZ 40PQFN |
| FDMF6705V | MODULE DRMOS 40A 1000KHZ 40PQFN |
| FDMF6705 | MODULE DRMOS HI PERF HF POWER66 |
| FDMF6706B | MODULE DRMOS 45A 40-PQFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| FDMF6704A_09 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:The Xtra Small, High Performance, High Frequency DrMOS Module |
| FDMF6704V | 功能描述:功率驱动器IC Xtr Sm Hi-Perf/ Hi-Eff DrMOS Module RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FDMF6705 | 功能描述:功率驱动器IC XS DrMOS; Hi-Freq Hi-Perf Module RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FDMF6705B | 功能描述:功率驱动器IC Xtra-Small Hi-Perf Hi-Freq DrMOS Module RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FDMF6705V | 功能描述:功率驱动器IC XS DrMOS; Hi-Freq Hi-Perf Module RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。