参数资料
| 型号： | FDMF6833C |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 3/19页 |
| 文件大小： | 0K |
| 描述： | MODULE DRMOS 50A 40-PQFN |
| 标准包装： | 3,000 |
| 系列： | XS™ DrMOS |
| 类型： | 高端/低端驱动器 |
| 输入类型： | PWM |
| 输出数： | 1 |
| 电流 - 输出 / 通道： | 50A |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-PowerTFQFN |
| 供应商设备封装： | 40-PQFN（6x6） |
| 包装： | 带卷 (TR) |
Pin Configuration
Figure 3.
Bottom View
Figure 4.
Top View
Pin Definitions
Pin #
Name
Description
When SMOD#=HIGH, the low-side driver is the inverse of the PWM input. When
1
SMOD# SMOD#=LOW, the low-side driver is disabled. This pin has a 10 μA internal pull-up current
source. Do not add a noise filter capacitor.
2
3
4
5, 37, 41
6
VCIN
VDRV
BOOT
CGND
GH
IC bias supply. Minimum 1 μF ceramic capacitor is recommended from this pin to CGND.
Power for the gate driver. Minimum 1 μF ceramic capacitor is recommended to be connected
as close as possible from this pin to CGND.
Bootstrap supply input. Provides voltage supply to the high-side MOSFET driver. Connect a
bootstrap capacitor from this pin to PHASE.
IC ground. Ground return for driver IC.
For manufacturing test only. This pin must float; it must not be connected to any pin.
7
PHASE Switch node pin for bootstrap capacitor routing. Electrically shorted to VSWH pin.
8
9 - 14, 42
15, 29 -
35, 43
16 – 28
36
38
39
40
NC
VIN
VSWH
PGND
GL
THWN#
DISB#
PWM
No connect. The pin is not electrically connected internally, but can be connected to VIN for
convenience.
Power input. Output stage supply voltage.
Switch node input. Provides return for high-side bootstrapped driver and acts as a sense point
for the adaptive shoot-through protection.
Power ground. Output stage ground. Source pin of the low-side MOSFET.
For manufacturing test only. This pin must float; it must not be connected to any pin.
Thermal warning flag, open collector output. When temperature exceeds the trip limit, the
output is pulled LOW. THWN# does not disable the module.
Output disable. When LOW, this pin disables the power MOSFET switching (GH and GL are
held LOW). This pin has a 10 μA internal pull-down current source. Do not add a noise filter
capacitor.
PWM signal input. This pin accepts a three-state 5 V PWM signal from the controller.
? 2011 Fairchild Semiconductor Corporation
FDMF6833C ? Rev. 1.0.4
3
www.fairchildsemi.com
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