参数资料
型号: FDS3170N7
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: JFETs
英文描述: 100V N-Channel PowerTrench MOSFET
中文描述: 6.7 A, 100 V, 0.026 ohm, N-CHANNEL, Si, POWER, MOSFET
封装: FLMP, SO-8
文件页数: 2/6页
文件大小: 208K
代理商: FDS3170N7
FDS3170N7 Rev C1(W)
Electrical Characteristics
Symbol
T
A
= 25°C unless otherwise noted
Test Conditions
Parameter
Min
Typ Max Units
Drain-Source Avalanche Ratings
(Note 2)
W
DSS
Drain-Source Avalanche Energy
I
AR
Drain-Source Avalanche Current
Single Pulse, V
DD
= 50 V, I
D
= 6.7 A
360
6.7
mJ
A
Off Characteristics
BV
DSS
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
GS
= 0 V,
I
D
= 250
μ
A
100
V
BV
DSS
T
J
I
DSS
I
GSS
I
D
= 250
μ
A, Referenced to 25
°
C
104
mV/
°
C
V
DS
= 80 V, V
GS
= 0 V
V
GS
=
±
20 V, V
DS
= 0 V
1
μ
A
nA
±
100
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= 250
μ
A, Referenced to 25
°
C
V
GS
= 10 V,
V
GS
= 6.0V, I
D
= 6.4 A
V
GS
= 10 V, I
D
= 6.7 A,T
J
= 125
°
C
V
DS
= 10 V, I
D
= 6.7 A
I
D
= 250
μ
A
2
2.5
–6.9
21
22
40
37
4
V
mV/
°
C
m
S
I
D
= 6.7 A
26
28
52
g
FS
Forward Transconductance
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
2714
171
82
1.1
pF
pF
pF
V
DS
= 50 V, V
GS
= 0 V,
f = 1.0 MHz
V
GS
= 15 mV, f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
14
10
49
24
55
12
14
26
18
80
40
77
ns
ns
ns
ns
nC
nC
nC
V
DD
= 50 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 50 V,
V
GS
= 10 V
I
D
= 6.7 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
t
RR
Reverse Recovery Time
Q
RR
Reverse Recovery Charge
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%, For Repetitive Avalanche Tj must be less the 150 °C
2.5
A
V
SD
V
GS
= 0 V,
I
S
= 2.5 A
(Note 2)
0.7
1.2
V
47
135
ns
I
F
= 6.7 A,
d
iF
/d
t
= 100 A/μs
(Note 2)
nC
a)
40°C/W when mounted
on a 1in
pad of 2 oz
copper
b)
85°C/W when mounted on
a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
F
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