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| 型号： | FIN1215MTD |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 10/20页 |
| 文件大小： | 0K |
| 描述： | SERIALIZER/DESERIALIZER 48-TSSOP |
| 标准包装： | 38 |
| 功能： | 串行器/解串器 |
| 数据速率： | 1.785Gbps |
| 输入类型： | LVTTL |
| 输出类型： | LVDS |
| 输入数： | 21 |
| 输出数： | 3 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 管件 |
2003 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FIN1215 / FIN1216 / FIN1217 Rev. 1.0.3
18
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Serializers
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AC Loadings and Waveforms (Continued)
Note: tRSKM is the budget for the cable skew and source clock skew plus Inter-Symbol Interference (ISI).
The minimum and maximum pulse position values are based on the bit position of each of the seven bits within
the LVDS data stream across PVT (Process, Voltage Supply, and Temperature).
Figure 22.
Receiver LVDS Input Skew Margin
Note: This jitter pattern is used to test the jitter response (clock out) of the device over the power supply range with
worst jitter ±ns (cycle-to-cycle) clock input. The specific test methodology is as follows:
Switching input data TxIn0 to TxIn20 at 0.5MHz and the input clock is shifted to left -3ns and to
the right +3ns when data is HIGH (by switching between CLK1 and CLK2 in Figure 11).
The ±3ns cycle-to-cycle input jitter is the static phase error between the two clock sources.
Jumping between two clock sources to simulate the worst-case of clock edge jump (3ns) from
graphical controllers. Cycle-to-cycle jitter at TxCLK out pin should be measured cross VCC range
with 100mV noise (VCC noise frequency <2MHz).
Figure 23.
Jitter Pattern
相关PDF资料 |
PDF描述 |
|---|---|
| FIN1216MTD | SERIALIZER/DESERIALIZER 48-TSSOP |
| 82-202 | N COAX CONN RG-8, RG-213 |
| 031-30220-1 | CONN PLUG BNC RG58 50 OHM |
| 031-3202 | CONN PLUG BNC CLAMP RG58,141,142 |
| 901-9610-3 | CONN SMA BULKHEAD JACK CRIMP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| FIN1215MTD_Q | 功能描述:功率驱动器IC Serial/De-Serializer LVDS 21Bit RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| FIN1215MTDX | 功能描述:LVDS 接口集成电路 Serial/De-Serializer LVDS 21Bit RoHS:否 制造商:Texas Instruments 激励器数量:4 接收机数量:4 数据速率:155.5 Mbps 工作电源电压:5 V 最大功率耗散:1025 mW 最大工作温度:+ 85 C 封装 / 箱体:SOIC-16 Narrow 封装:Reel |
| FIN1215MTDX_NL | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:LVDS 21-Bit Serializers/De-Serializers |
| FIN1215MTDX_Q | 功能描述:LVDS 接口集成电路 Serial/De-Serializer LVDS 21Bit RoHS:否 制造商:Texas Instruments 激励器数量:4 接收机数量:4 数据速率:155.5 Mbps 工作电源电压:5 V 最大功率耗散:1025 mW 最大工作温度:+ 85 C 封装 / 箱体:SOIC-16 Narrow 封装:Reel |
| FIN1216 | 制造商:FAIRCHILD 制造商全称:Fairchild Semiconductor 功能描述:LVDS 21-Bit Serializers/De-Serializers |
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