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参数资料
| 型号： | FN3000-810-830 |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, DMA37 |
| 文件页数： | 8/12页 |
| 文件大小： | 702K |
| 代理商： | FN3000-810-830 |
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201 McLean Blvd, Paterson, NJ 07504 Tel: (973) 881-8800 Fax: (973) 881-8361
E-mail: sales@synergymwave.com Web Site: http://www.synergymwave.com
[ 174 ]
1. Introduction
Synergy’s FN3000-series fractional-N synthesizers are programmed with serial data through a three-wire line carrying
CLOCK, DATA, and STROBE signals. The programming data sent to the synthesizer resides in sixteen 8-bit registers at
four address locations (Figure 1).
2. Frequency Command Format
Command Contents. Setting the synthesizer to a given frequency requires the communication of the binary equivalent
of a fractional-division number determined by the formula
(1)
where
M = Fractional-division number
R = Reference-frequency division number
P = RF prescaler divisor
F
VCO = VCO frequency in MHz
F
ref = Reference frequency in MHz
The parameters R and P are set at the factory for each synthesizer model depending on the VCO frequency and
bandwidth, and electrical performance requirements, such as spurious suppression, phase noise, and so on.
The reference division number R can be set to one of two factory-defined values, one of which serves as a default. R
must be changed from its default value for certain frequencies, which are specific to the FN3000 version used, to
achieve the best spurious and phase-noise performance. The user is provided with a list of these frequencies and the
new R value, which must be used to calculate M using Equation (1). (Appendix 1 shows a sample list of such frequen-
cies for the example presented in Section 5, below.)
The binary equivalent of the division number M is sent to the synthesizer as data bits combined with address and
factory-determined command bits. The integer portion of M is loaded as a 16-bit binary word into two registers. The
decimal portion of M is loaded as a 40-bit binary word into two registers.
Synergy provides the user with an executable file for evaluation of the fractional synthesizer. Synergy also provides a
program to calculate the binary equivalent of the integer and fractional parts of the division number.
Command Structure. For each frequency, the programming information sent to the synthesizer consists of 160 bits of
data sent as four 40-bit packets comprising the division number in binary form, plus control and address bits. Each 40-
bit packet consists of 32 bits of data and an 8-bit address, with the most significant bit (MSB) loaded first. Figure 2
shows the data format for one address location.
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