参数资料
型号: FPF1204UCX
厂商: Fairchild Semiconductor
文件页数: 10/12页
文件大小: 0K
描述: IC LOAD SWITCH INTELLIMAX 4WLCSP
标准包装: 3,000
系列: IntelliMax™
类型: 高端开关
输出数: 1
Rds(开): 45 毫欧
内部开关:
电流限制: 1.5A
输入电压: 1.2 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 4-UFBGA,WLCSP
供应商设备封装: 4-WLCSP(0.76x0.76)
包装: 带卷 (TR)
Operation and Application Description
The FPF1203 / 03L / 04 / 045 are low-R ON P-channel
load switches with controlled turn-on. The core of each
device is a 55 m ? P-channel MOSFET and controller
capable of functioning over a wide input operating range
of 1.2 to 5.5 V.
The FPF1204 / 45 contain a 65 ? on-chip load resistor
for quick output discharge when the switch is turned off.
The FPF12045 features a faster V OUT Rise Time of 5 μ s.
Output Capacitor
A 0.1 μF capacitor, C OUT , should be placed between the
V OUT and GND pins. This capacitor prevents parasitic
board inductance from forcing V OUT below GND when
the switch is on. C IN greater than C OUT is highly
recommended. C OUT greater than C IN can cause V OUT to
exceed V IN when the system supply is removed. This
could result in current flow through the body diode from
V OUT to V IN .
90%
90%
VOUT
10%
t R
t F
10%
3.3V
50%
50%
VON
Figure 22. Typical Application
90%
Input Capacitor
VOUT
10%
t DON
To limit the voltage drop on the input supply caused by
transient inrush current when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor
must be placed between the V IN and GND pins. A 1 μF
ceramic capacitor, C IN , placed close to the pins is
usually sufficient. Higher-value C IN can be used to
reduce the voltage drop in higher-current applications.
? 2011 Fairchild Semiconductor Corporation
FPF1203 / FPF1203L / FPF1204 / FPF12045 ? Rev. 1.2.2
t DOFF
Figure 23. Timing Diagram for FPF1203/4/045
Board Layout
For best performance, traces should be as short as
possible. To be most effective, input and output
capacitors should be placed close to the device to
minimize the effect of parasitic trace inductance on
normal and short-circuit operation. Using wide traces or
large copper planes for all pins (VIN, VOUT, ON, and
GND) minimizes the parasitic electrical effects and the
case-ambient thermal impedance. However, the VOUT
pin should not connect directly to the battery source due
to the discharge mechanism of the load switch.
www.fairchildsemi.com
10
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